CoreOps.mesa 
Copyright © 1985 by Xerox Corporation. All rights reserved.
Barth, December 5, 1985 12:34:10 pm PST
Bertrand Serlet November 26, 1985 3:32:28 pm PST
Spreitzer, November 7, 1985 5:20:31 pm PST
Louis Monier December 16, 1985 3:18:14 pm PST
DIRECTORY Core;
CoreOps: CEDAR DEFINITIONS = BEGIN OPEN Core;
Theory
This interface defines interesting utilities for the data structure defined in Core.
Names
The standard property nameProp allows naming of cellTypes, instances, wires (in that last case the name is the step name, by contrast with the full name).
nameProp: ATOM;
Cell Classes
printClassProcProp: ATOM;
PrintClassProc: TYPE = PROC [data: REF ANY, out: STREAM];
Cell Types
CreateCellType: PROC [class: CellClass, public: Wire, data: REF ANYNIL, name: ROPENIL, props: Properties ← NIL] RETURNS [cellType: CellType];
name is added to the other properties (under the prop nameProp)
GetCellTypeName: PROC [cellType: CellType] RETURNS [name: ROPENIL];
Recast: RecastProc;
Always returns the same pointer, given same cell type.
PrintCellType: PROC [cellType: CellType, out: STREAM, depth: NAT ← 0];
PrintIndent: PROC [depth: NAT, out: STREAM]; -- utility
Creation of Wires
For the following creation procs, name is added to the other properties (under the prop nameProp)
CreateWire: PROC [size: NAT ← 0, name: ROPENIL, props: Properties ← NIL] RETURNS [wire: Wire];
CreateSequenceWire: PROC [elements: LIST OF Wire, name: ROPENIL, props: Properties ← NIL] RETURNS [wire: Wire];
SubrangeWire: PROC [wire: Wire, start, size: NAT, name: ROPENIL, props: Properties ← NIL] RETURNS [sub: Wire];
WiresToWire: PROC [wires: LIST OF Wire, name: ROPENIL, props: Properties ← NIL] RETURNS [wire: Wire];
CopyWire: PROC [wire: Wire] RETURNS [new: Wire];
sequenceProp: ATOM;
Waiting for a replacement, a non-nil value indicates that the structure should be viewed as a sequence
Enumerating Wires
EachWireProc: TYPE = PROC [wire: Wire] RETURNS [subWires: BOOLTRUE, quit: BOOLFALSE];
EachWirePairProc: TYPE = PROC [actualWire, publicWire: Wire] RETURNS [subWires: BOOLTRUE, quit: BOOLFALSE];
VisitWire: PROC [wire: Wire, eachWire: EachWireProc] RETURNS [quit: BOOL];
VisitBinding: PROC [actual, public: Wire, eachWirePair: EachWirePairProc] RETURNS [quit: BOOL];
TRUE is returned if some invocation of eachWirePair returns quit=TRUE or if the 2 wires do not conform
Conform: PROC [actual, public: Wire] RETURNS [BOOL];
Checks that the actual and the public conform, i.e. that they are either atomic, or made of conformant sequence of wires of the same size.
WireBits: PROC [wire: Wire] RETURNS [bits: NAT];
Computes the number of atomic wires reachable from wire.
Naming of Wires (temporary)
GetWireName: PROC [wire: Wire] RETURNS [name: ROPENIL];
GetWireIndex: PROC [wire: Wire, name: ROPE] RETURNS [n: INT ← -1];
If wire is not atomic, and wire[i] has name "name" , then returns "i"; -1 if not found.
FullNameWire: PROC [wire: Wire, name: ROPENIL, prop: ATOM ← publicFullName];
Attaches full path names to wire tree starting with initial name "name" on wire "wire" using property "prop". For each recursive call (different from the first one) appends .(wire.elements[i].name) if structure = record or [index] if structure = sequence.
NameWireProc: TYPE = PROC [data: REF ANY];
nameClassWireProcProp: ATOM;
publicFullName: ATOM;
Printing of Wires (temporary)
PrintWire: PROC [wire: Wire, out: STREAM, depth: NAT ← 0];
Operations on LIST OF Wires
Reverse: PROC [wires: LIST OF Wire] RETURNS [revWires: LIST OF Wire ← NIL];
Delete: PROC [wires: LIST OF Wire, wire: Wire] RETURNS [newWires: LIST OF Wire ← NIL];
Member: PROC [wires: LIST OF Wire, wire: Wire] RETURNS [BOOL];
END.