CoreSequenceImpl.mesa
Copyright © 1985 by Xerox Corporation. All rights reserved.
Barth, November 6, 1985 9:03:51 am PST
Spreitzer, August 12, 1985 5:22:30 pm PDT
Bertrand Serlet November 12, 1985 1:51:01 pm PST
Louis Monier October 23, 1985 4:03:46 pm PDT
DIRECTORY Core, CoreClasses, CoreOps, CoreProperties, CoreSequence, IO;
CoreSequenceImpl:
CEDAR
PROGRAM
IMPORTS CoreClasses, CoreOps, CoreProperties, IO
EXPORTS CoreSequence =
BEGIN OPEN Core, CoreSequence;
sequenceCellClass: PUBLIC CellClass ← NEW[CellClassRec ← [name: "Sequence", recast: Recast, properties: CoreProperties.Props[[CoreOps.printClassProcProp, NEW[CoreOps.PrintClassProc ← PropPrintClass]]]]];
Recast: RecastProc = {
seqCell: SequenceCellType ← NARROW[me.data];
recCell: CoreClasses.RecordCellType ← NEW[CoreClasses.RecordCellTypeRec];
stitchesLength: NAT ← IF seqCell.stitches#NIL THEN seqCell.stitches.length ELSE 0;
new ← CoreOps.CreateCellType[
class: CoreClasses.recordCellClass,
public: CoreOps.CopyWireSequence[me.public],
data: recCell,
name: CoreOps.GetCellTypeName[me],
props: CoreProperties.CopyProps[propList: me.properties]];
recCell.internal ← NEW [WireSequenceRec[new.public.size + stitchesLength]];
FOR w:
NAT
IN [0..new.public.size)
DO
recCell.internal[w] ← new.public[w];
ENDLOOP;
FOR w:
NAT
IN [new.public.size .. recCell.internal.size)
DO
recCell.internal[w] ← NEW[WireRec];
CoreProperties.PutWireProp[recCell.internal[w], CoreOps.sequenceProp, CoreOps.sequenceProp];
recCell.internal[w].elements ← NEW[WireSequenceRec[seqCell.count]];
ENDLOOP;
FOR cell:
NAT
IN [0..seqCell.count)
DO
newWire: WireSequence ← NEW [WireSequenceRec[new.public.size] ← new.public^];
FOR seqWire:
NAT
IN [0..seqCell.length)
DO
seqElement: NAT ← seqCell.sequence[seqWire];
IF CoreProperties.GetWireProp[seqCell.base.public[seqElement], CoreOps.sequenceProp]#
NIL
THEN {
size: NAT ← seqCell.base.public[seqElement].elements.size;
actWire: Wire ←
NEW [WireRec ← [
elements: NEW [WireSequenceRec[size]]]];
CoreProperties.PutWireProp[actWire, CoreOps.sequenceProp, CoreOps.sequenceProp];
FOR i:
NAT
IN [0..size)
DO
actWire.elements[i] ← newWire[seqElement].elements[(size*cell)+i];
ENDLOOP;
newWire[seqElement] ← actWire;
}
ELSE newWire[seqElement] ← newWire[seqElement].elements[cell];
ENDLOOP;
IF stitchesLength>0 THEN ERROR; -- not yet implemented
FOR stitchWire:
NAT
IN [0..stitchesLength)
DO
internal: Wire;
IF cell < seqCell.count -1
THEN {
internal ← CoreOps.CopyWire[wire: seqCell.base.public[seqCell.stitches[stitchWire].source]];
recCell.internal[stitchWire + new.public.size].elements[cell] ← internal;
newWire[seqCell.stitches[stitchWire].source] ← internal;
};
IF cell > 0 THEN newWire[seqCell.stitches[stitchWire].sink] ← recCell.internal[stitchWire + new.public.size].elements[cell-1];
ENDLOOP;
recCell.instances ←
CONS [
NEW [CoreClasses.CellInstanceRec ← [
actual: newWire,
type: seqCell.base,
properties: CoreProperties.Props[[CoreClasses.instanceNameProp, IF CoreOps.GetCellTypeName[seqCell.base]=NIL THEN NIL ELSE IO.PutFR["%g%g", IO.rope[CoreOps.GetCellTypeName[seqCell.base]], IO.int[cell]]]]
]],
recCell.instances];
ENDLOOP;
};
Create:
PUBLIC
PROC [args: SequenceCellType, name:
ROPE ←
NIL, props: Properties ←
NIL]
RETURNS [cellType: CellType] = {
cellType ← CoreOps.CreateCellType[
class: sequenceCellClass,
public: CoreOps.CopyWireSequence[args.base.public],
data: args,
name: name,
props: props];
FOR i:
NAT
IN [0..args.length)
DO
wire: Wire ← cellType.public[args.sequence[i]];
IF CoreProperties.GetWireProp[wire, CoreOps.sequenceProp]#
NIL
THEN {
newSeqLength: NAT ← args.count * wire.elements.size;
newSeq: WireSequence ← NEW[WireSequenceRec[newSeqLength]];
base: Wire ← wire.elements[0];
FOR i:
NAT
IN [0..newSeqLength)
DO
newSeq[i] ← CoreOps.CopyWire[wire: base];
ENDLOOP;
cellType.public[args.sequence[i]].elements ← newSeq;
}
ELSE {
newWire: Wire ← CoreOps.CreateBasicSequenceWire[args.count, CoreOps.GetWireName[wire]];
FOR i:
NAT
IN [0..args.count)
DO
newWire.elements[i] ← CoreOps.CopyWire[wire: wire];
ENDLOOP;
cellType.public[args.sequence[i]] ← newWire;
};
ENDLOOP;
};
PropPrintClass: CoreOps.PrintClassProc = {Print[NARROW[data], out]};
Print:
PUBLIC
PROC [cell: SequenceCellType, out:
IO.
STREAM] = {
IO.PutF[out, "\n\nBase cell type: %g", IO.rope[CoreOps.GetCellTypeName[cell.base]]];
IO.PutF[out, ", count: %g", IO.int[cell.count]];
IO.PutRope[out, "\nstitch wires:"];
IF cell.stitches#
NIL
THEN
FOR stitch:
NAT
IN [0 .. cell.stitches.length)
DO
IO.PutF[out, " (%g, %g)", IO.rope[CoreOps.GetWireName[cell.base.public[cell.stitches[stitch].source]]], IO.rope[CoreOps.GetWireName[cell.base.public[cell.stitches[stitch].sink]]]];
ENDLOOP;
IO.PutRope[out, "\nsequence wires:"];
FOR seq:
NAT
IN [0 .. cell.length)
DO
IO.PutF[out, " %g", IO.rope[CoreOps.GetWireName[cell.base.public[cell[seq]]]]];
ENDLOOP;
};
END.