<> <> <> <> <> DIRECTORY Core, CoreClasses, SymTab; CoreCompose: CEDAR DEFINITIONS = BEGIN <> ROPE: TYPE = Core.ROPE; CellType: TYPE = Core.CellType; WireSequence: TYPE = Core.WireSequence; TransistorType: TYPE = CoreClasses.TransistorType; InstanceList: TYPE = LIST OF InstanceRec; InstanceRec: TYPE = RECORD[ actual: ROPE, -- need a parser to turn it into actual wires type: CellType]; <<-- A Context is a stack of properties>> Context: TYPE = REF ContextRec; CContext: TYPE = Context; ContextRec: TYPE = RECORD [ -- we'll make it opaque later! stack: Stack _ NIL, -- stack of pairs [atom, ref]; order matters tab: SymTab.Ref _ NIL]; Stack: TYPE = PropertyLiterals; PropertyLiteral: TYPE = RECORD[key: ATOM, val: REF]; PropertyLiterals: TYPE = LIST OF PropertyLiteral; <> GetRef: PROC [context: Context, prop: ATOM] RETURNS [REF]; GetAtom: PROC [context: Context, prop: ATOM] RETURNS [ATOM]; GetRope: PROC [context: Context, prop: ATOM] RETURNS [ROPE]; GetInt: PROC [context: Context, prop: ATOM] RETURNS [INT]; GetReal: PROC [context: Context, prop: ATOM] RETURNS [REAL]; GetBool: PROC [context: Context, prop: ATOM] RETURNS [BOOL]; PushRef: PROC [context: Context, prop: ATOM, val: REF]; PushAtom: PROC [context: Context, prop: ATOM, val: ATOM]; PushRope: PROC [context: Context, prop: ATOM, val: ROPE]; PushInt: PROC [context: Context, prop: ATOM, val: INT]; PushReal: PROC [context: Context, prop: ATOM, val: REAL]; PushBool: PROC [context: Context, prop: ATOM, val: BOOL]; RegisterRefProperty: PROC [prop: ATOM]; RegisterAtomProperty: PROC [prop: ATOM]; RegisterRopeProperty: PROC [prop: ATOM]; RegisterIntProperty: PROC [prop: ATOM]; RegisterRealProperty: PROC [prop: ATOM]; RegisterBoolProperty: PROC [prop: ATOM]; CreateContext: PROC [init: Context _ NIL, props: PropertyLiterals _ NIL] RETURNS [Context]; MarkContext: PROC [context: Context, mark: ATOM]; PopContext: PROC [context: Context, mark: ATOM]; <> StructureProc: TYPE = PROC [context: Context] RETURNS [cellType: CellType]; <> <<>> RegisterStructureProc: PROC [name: ROPE, proc: StructureProc] RETURNS [ROPE]; <> <<>> CreateStructure: PROC [name: ROPE, context: Context] RETURNS [CellType]; IsRegistered: PROC [name: ROPE] RETURNS [BOOL]; <> CreateTransistor: PROC [name: ROPE _ NIL, type: TransistorType _ nE, length: NAT _ 2, width: NAT _ 4] RETURNS [cellType: CellType]; CreateRecordCell: PROC [name: ROPE, public: WireSequence, onlyInternal: WireSequence _ NIL, instances: InstanceList _ NIL, context: Context] RETURNS [cellType: CellType]; CreateSequenceCell: PROC [name: ROPE, baseCell: CellType, count: NAT, sequencePorts: ROPE _ NIL] RETURNS [cellType: CellType]; <> <<-- Uses the parser>> CreateWires: PROC [context: Context, rope: ROPE] RETURNS [wire: WireSequence]; END. <> <> <> <> <> <> <> <> <> <> <<>> <> <> <> <> <<>> <> <> <> <> << >> <> <> <> <<>> <> <> <> <> <>