DIRECTORY Core;CoreOps: CEDAR DEFINITIONS = BEGIN OPEN Core;nameProp: ATOM;SetClassPrintProc: PROC [class: CellClass, proc: PrintClassProc] RETURNS [sameClass: CellClass];PrintClassProc: TYPE = PROC [data: REF ANY, out: STREAM, indent: NAT _ 0, level: NAT _ 2];CreateCellType: PROC [class: CellClass, public: Wire, data: REF ANY _ NIL, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [cellType: CellType];SetCellTypeName: PROC [cellType: CellType, name: ROPE] RETURNS [sameCellType: CellType];GetCellTypeName: PROC [cellType: CellType] RETURNS [name: ROPE];Recast: RecastProc;ToBasic: PROC [cellType: Core.CellType] RETURNS [basic: Core.CellType];PrintCellType: PROC [cellType: CellType, out: STREAM _ NIL, indent: NAT _ 0, level: NAT _ 2];PrintIndent: PROC [indent: NAT, out: STREAM, cr: BOOL _ TRUE];CreateWire: PROC [elements: Wires _ NIL, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [wire: Wire];CreateWires: PROC [size: NAT, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [wire: Wire];SubrangeWire: PROC [wire: Wire, start, size: NAT, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [sub: Wire];CopyWire: PROC [wire: Wire] RETURNS [new: Wire]; UnionWire: PROC [wire1, wire2: Wire, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [union: Wire];EachWireProc: TYPE = PROC [wire: Wire] RETURNS [subWires: BOOL _ TRUE, quit: BOOL _ FALSE];EachWirePairProc: TYPE = PROC [actualWire, publicWire: Wire] RETURNS [subWires: BOOL _ TRUE, quit: BOOL _ FALSE];VisitWire: PROC [wire: Wire, eachWire: EachWireProc] RETURNS [quit: BOOL];VisitAtomicWires: PROC [wire: Wire, eachWire: PROC [Wire]];VisitBinding: PROC [actual, public: Wire, eachWirePair: EachWirePairProc] RETURNS [quit: BOOL]; Conform: PROC [actual, public: Wire] RETURNS [BOOL];WireBits: PROC [wire: Wire] RETURNS [bits: NAT];SetShortWireName: PROC [wire: Wire, name: ROPE] RETURNS [sameWire: Wire];GetShortWireName: PROC [wire: Wire] RETURNS [name: ROPE];GetWireIndex: PROC [wire: Wire, name: ROPE] RETURNS [n: INT _ -1];GetFullWireNames: PROC [root, wire: Wire] RETURNS [names: LIST OF ROPE];GetFullWireName: PROC [root, wire: Wire] RETURNS [name: ROPE];IsFullWireName: PROC [root, wire: Wire, name: ROPE] RETURNS [BOOL];FindWire: PROC [root: Wire, name: ROPE] RETURNS [wire: Wire _ NIL];ParseWireName: PROC [name: ROPE] RETURNS [base: ROPE, components: LIST OF ROPE _ NIL];PrintWire: PROC [wire: Wire, out: STREAM _ NIL, indent: NAT _ 0, level: NAT _ 2];FlushNameCaches: PROC [root: Wire];Reverse: PROC [wires: Wires] RETURNS [revWires: Wires _ NIL];Delete: PROC [wires: Wires, wire: Wire] RETURNS [newWires: Wires _ NIL];Member: PROC [wires: Wires, wire: Wire] RETURNS [BOOL];RecursiveMember: PROC [wire, candidate: Wire] RETURNS [BOOL];FixStupidRef: PROC [ref: REF ANY] RETURNS [rope: ROPE];Print: PROC [ref: REF, out: STREAM _ NIL, indent: NAT _ 0, level: NAT _ 2];END.   
Р  CoreOps.mesa	Copyright c 1985 by Xerox Corporation.  All rights reserved.Barth, January 28, 1986 3:33:03 pm PSTBertrand Serlet May 29, 1986 7:31:55 pm PDTSpreitzer, April 8, 1986 4:29:54 pm PSTLouis Monier May 1, 1986 4:43:54 pm PDTPradeep Sindhu February 7, 1986 3:20:36 pm PSTTheoryThis interface defines interesting utilities for the data structure defined in Core.PropertyThis atom is used by various types (wires, cellTypes, ...) to precise a name (of type ROPE).Cell ClassesCell TypesAlways returns the same pointer, given same cell type.Recasts as much as possible.Wire CreationProperties are copied using CoreProperties.CopyPropsCreates a new structured wire of size wire1.size+wire2.size, with corresponding name and propertiesWire EnumerationReturns quit iff eachWire did.Visits the wire as a tree: each subwire reachable n ways is reached each of those n ways.  Short for previous function, when only atomic wires should be enumerated, and when the quit argument is not needed.Visits the wire as a tree: each subwire reachable n ways is reached each of those n ways.  Visits two wires as trees in parallel.  Aborts visit and returns quit=TRUE iff eachWirePair returns quit=TRUE or differing structure (viewed as trees) found.Works only for trees, not DAGs; checks that they have the same structure.Computes the number of atomic wires reachable from wire.Wire NamingWires have attached 2 kinds of names: short names (at most one per wire) and full names, which are relative to a root wire (such as public or internal), and which are a list of ROPE since we have DAGs.If wire is not atomic, and wire[i] has short name "name" , then returns "i"; -1 if not found.Appends .name if a short name is on the wire otherwise appends [index].  Should only be called with root DAGs, e.g. a public wire.  Full path names relative to the root DAG are cached (property on the root).Short for the previous one, when it is known that there is only and exactly one full name.Will provoke an error when called with a wire that has 0 or more than one full name.Should only be called with root DAGs, e.g. a public wire.  Fetches a wire part of root with full name name.  NIL is returned if no wire or more than one is found.Breaks apart a wire name into its components.  Eg., given the name "foo.mumble[3].bar", base is "foo", and components is LIST["mumble", "3", "bar"]. Various caches are stored on roots, and this function may get rid of them.Wire List OperationsSearches for wire in the list wires.Searches for candidate in the structured wire treeWire.MiscellaneousConverts a rope or ref text into a rope.Works on Wire and CellType.  User convenience only. Э╩Ъ  Ш Ц"Cedar" styleЪЬЩJЪЬ
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