SSIBhvImpl.mesa
Copyright © 1985 by Xerox Corporation. All rights reserved.
Last Edited by: Barth, July 10, 1985 8:29:54 pm PDT
DIRECTORY CoreBitOps, CoreSSIImpl, ChipCreate, SSIBhvDef;
SSIBhvImpl:
CEDAR
PROGRAM
IMPORTS CoreBitOps, ChipBehaviour
EXPORTS SSIBhvDef =
BEGIN OPEN ChipBehaviour, SSIBhvDef;
Tristate Buffer
TristateBufferInit: InitProc = {
valueAny ← NEW[TristateBufferValueRec];
strengthAny ← NEW[TristateBufferStrengthRec];
};
TristateBufferBehaviour: SimpleEvalProc = {
value: TristateBufferValueRef ← NARROW[valueAny];
s: TristateBufferStrengthRef ← NARROW[strengthAny];
{
OPEN value;
IF (Drive AND nDrive) OR (NOT Drive AND NOT nDrive) THEN Stop["Bad control signals in tristate buffer", $FailedAssertion];
Output ← NOT nDataIn;
s.Output ← IF Drive THEN drive ELSE ignore;
};
};
NAnd
NAndInit: InitProc = {
args: CoreSSIImpl.NAndArgsRef ← NARROW[argsAny];
valueAny ← NEW[NAndValueRec];
value.Input ← NEW[BitOps.BitMWordRec[BitOps.SizeBits[args.inputCount]]];
strengthAny ← NEW[NAndStrengthRec];
};
NAndBehaviour: SimpleEvalProc = {
args: NAndArgsRef ← NARROW[argsAny];
value: NAndValueRef ← NARROW[valueAny];
{
OPEN args, value;
nOutput ← FALSE;
FOR i:
NAT
IN [0..inputCount)
DO
IF
NOT BitOps.
EBFM[Input, i]
THEN {
nOutput ← TRUE;
EXIT;
};
ENDLOOP;
};
};
RegisterCells:
PROC [design: Design] = {
RegisterBehaviour[design: design, cellTypeName: "TristateBuffer", init: TristateBufferInit, evalSimple: TristateBufferBehaviour];
RegisterBehaviour[design: design, cellTypeName: "NAnd", init: NAndInit, evalSimple: NAndBehaviour];
};
END.