CoreBeau.mesa
Copyright © 1985 by Xerox Corporation. All rights reserved.
Created by Bertrand Serlet, November 13, 1985 2:59:33 pm PST
Bertrand Serlet, November 26, 1985 2:22:15 pm PST
This interface should provide all the syntactic sugar to help the designer create Core data structures, while retaining the ability to have handles on the real Core objects.
DIRECTORY
Core USING [CellType, ROPE, Wire],
CoreClasses USING [CellInstance, TransistorType];
CoreBeau: CEDAR DEFINITIONS =
BEGIN
Aliases
CellType: TYPE = Core.CellType;
ROPE: TYPE = Core.ROPE;
Wire: TYPE = Core.Wire;
CellInstance: TYPE = CoreClasses.CellInstance;
TransistorType: TYPE = CoreClasses.TransistorType;
Creation of Wires
WR: TYPE = REF;
WR is the union of the types Wire and ROPE, for user convenience.
WireList: PROC [wrs: LIST OF WRNIL] RETURNS [Wire];
Basic constructor for creating a structured wire. It is checked that each WR is of type Wire or ROPE.
Wires: PROC [wr1, wr2, wr3, wr4, wr5, wr6, wr7, wr8, wr9, wr10, wr11, wr12, wr13: WRNIL] RETURNS [Wire];
Syntactic sugar of the previous for creating a structured wire. It is checked that each WR is of type Wire or ROPE.
Seq: PROC [wr: WR, size: NAT] RETURNS [Wire];
Constructor for creating structured wires with the attribute 'sequence'. It is checked that WR is either an atomic Wire or a ROPE.
Index: PROC [wr: WR, index: NAT] RETURNS [WR];
Extractor for extracting a wire from a sequence. If the argument is a Wire, it is checked that it has structure, and then the element is extracted. If the argument is a ROPE, the suffix "[index]" is added to it. All other types are illegal.
Indexes: PROC [wr: WR, start: NAT ← 0, length: NAT] RETURNS [Wire];
Extractor/Constructor for creating a structured wire with the attribute 'sequence'. If the argument is a Wire, it is checked that it has structure, and then the sub elements are extracted and recomposed. If the argument is a ROPE, a composed wire made subwires named after the suffixed rope is constructed.
Bindings, Instances and RecordCell
PA: TYPE = RECORD [public, actual: WR];
Records a binding between part of the public
Instance: PROC [type: CellType, pa1, pa2, pa3, pa4, pa5, pa6, pa7, pa8, pa9, pa10, pa11, pa12, pa13: PA ← []] RETURNS [CellInstance];
The bindings might be incomplete, in that case new wires are created to fill the actual.
Cell: PROC [name: ROPENIL, public, onlyInternal: Wire ← NIL, instances: LIST OF CellInstance] RETURNS [CellType];
Creates a CoreClasses.RecordCell, creates an internal by making the union of public and onlyInternal, names all those wires with unique names, fills the public, fills the instances, and finally replaces all actual wires by wires having the same name in the public.
Other cell type creation
Transistor: PROC [name: ROPENIL, type: TransistorType ← nE, length: NAT ← 2, width: NAT ← 4] RETURNS [CellType];
Creates a CoreClasses.Transistor.
SequenceCell: PROC [name: ROPENIL, baseCell: CellType, count: NAT, sequencePorts: Wire ← NIL] RETURNS [CellType];
Creates a CoreSequence.SequenceCellType.
Utility
FindWire: PROC [cell: CellType, wr: WR] RETURNS [Wire];
Looks into the internal (If the cell is a RecordCell) or in the public (otherwise) to retrieve a wire equal (if wr is a Wire) or having same name (if wr is a Wire or a ROPE). Returns NIL when not finding wr or finding it more than once.
END.