
DIRECTORY 
CD USING [Design],
Core USING [CellClass, CellType, Properties, Wire, Wires],
Boole USING [Expression],
CoreCreate USING [PA, WR],
Rope USING [ROPE],
Sisyph USING [Context];

BooleCore: CEDAR DEFINITIONS = BEGIN
Expression: TYPE = Boole.Expression;
ROPE: TYPE = Rope.ROPE;
CellType: TYPE = Core.CellType;
Properties: TYPE = Core.Properties;
Wire: TYPE = Core.Wire;
Wires: TYPE = Core.Wires;
WR: TYPE = CoreCreate.WR;
PA: TYPE = CoreCreate.PA;
inputXmeansX: BOOL;

InputRec: TYPE = RECORD [
input: WR, driver: CellType, pas: LIST OF PA _ NIL
];
OutputRec: TYPE = RECORD [
output: WR, expr: Expression, driver: CellType, pas: LIST OF PA _ NIL
];

Inputs: TYPE = LIST OF InputRec;
Outputs: TYPE = LIST OF OutputRec;

alpsClass: Core.CellClass;

cellLibrary: CD.Design;	-- read from BooleLibrary.dale
cx: Sisyph.Context;		-- the Sysiph context derived form it

AlpsCell: PROC [public: Wire, inputs: Inputs, outputs: Outputs, name: ROPE _ NIL, props: Properties _ NIL] RETURNS [recordCell: CellType];

WireVar: PROC [public: Wire, wr: WR] RETURNS [expr: Expression];
EqualInt: PROC [public: Wire, wr: WR, int: INT] RETURNS [expr: Expression];
CreatePlusMinus: PROC [name: ROPE] RETURNS [wire: Wire];

Size: PROC [vars: LIST OF ROPE, expr: Expression] RETURNS [size: INT _ 0];

Reorder: PROC [expr: Expression, public: Wire] RETURNS [newExpr: Expression];

ReorderVars: PROC [expr: Expression, vars: LIST OF ROPE] RETURNS [newExpr: Expression];

END.
��p��BooleCore.mesa	
Copyright c 1985 by Xerox Corporation.  All rights reversed.
Created by Bertrand Serlet August 13, 1985 5:38:56 pm PDT
Bertrand Serlet May 6, 1986 3:51:03 pm PDT
Louis Monier April 8, 1986 11:54:49 am PST
Common Types
Connection with CoreCreate
The public of driver must contain an atomic wire named "Input", and a structured wire named "Output", with 2 components named "Plus" and "Minus".  The layout of the driver must be a cell of BooleLibrary.  Inter driver communication (such as "Gnd" or "Vdd") should not appear in pas.  In effect, pas should only contain the input-dependent bindings (such as "Clock", "PhiA").  
The public of driver must contain a structured wire named "Input", with 2 components named "Plus" and "Minus", and an atomic wire named "Output".  The layout of the driver must be a cell of BooleLibrary.  Inter driver communication (such as "Gnd" or "Vdd") should not appear in pas.  In effect, pas should only contain the output-dependent bindings (such as "Clock", "PhiA").  
Objects of class alpsCellClass know how to simulate themselves with Rosemary, and how to generate their layouts.
The returned recordCell contains all the given drivers as instances, plus a bunch of instances of class alpsClass, that are simulable with Rosemary. 
Public should contain two wires called "Gnd" and "Vdd" that are the power supply.
Order of inputs gives the order of the input variables (left to right).
Order of outputs gives the order of the outputs (bottom to top).
The property $ContactPolyMetal2 (if present in props) is a REF INT specifying how often the layout has poly-metal2 contacts (in line units).  
Returns the expression that wr expresses
Returns the expression so that the atomic wires of wr express in binary the quantity int.  Wr must be a real Core.Wire (WR is there only for user convenience, but a ROPE does not make sense).
Implementors goodies
 
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