<> <> <> <> <> <> CIRCUIT[Lambda _ 1, Temp _ 25, N _ 1] = { Vdd: node; ! ThymeBasics ! CMOS2.0u25C ! FullAdder powerSupply: voltage[Vdd, Gnd] = 5.0; ?: Stray[Vdd| aM2_32, pM2_16]; inputa: node; ?: Stray[inputa| aP_16, pP_16]; $~inputa$: node; ?: Stray[$~inputa$| aP_16, pP_16]; inputb: node; ?: Stray[inputb| aP_16, pP_16]; $~inputb$: node; ?: Stray[$~inputb$| aP_16, pP_16]; inputc: node; ?: Stray[inputc| aP_16, pP_16]; $~inputc$: node; ?: Stray[$~inputc$| aP_16, pP_16]; Sum: node; ?: Stray[Sum| aM_72, pM_36]; $~Sum$: node; ?: Stray[$~Sum$| aM_72, pM_36]; Carry: node; ?: Stray[Carry| aM_72, pM_36]; $~Carry$: node; ?: Stray[$~Carry$| aM_72, pM_36]; C: FullAdderCore[Gnd, Gnd, Gnd, Gnd, Gnd, Gnd, Gnd, $~inputa$, inputa, $~inputb$, inputb, inputc, $~inputc$, $~Carry$, $~Sum$, Sum, Carry, Vdd, Gnd| N_N]; ?: capacitor[Sum, Gnd] = 0.001pF; ?: capacitor[$~Sum$, Gnd] = 0.001pF; ?: capacitor[Carry, Gnd] = 0.001pF; ?: capacitor[$~Carry$, Gnd] = 0.001pF; ?: RectWave[inputa | width _ 12ns, tRise _ 4ns, tFall _ 4ns, tDelay _ 10ns]; ?: RectWave[$~inputa$ | OnLevel _ 0.0, OffLevel _ 5.0, width _ 12ns, tRise _ 4ns, tFall _ 4ns, tDelay _ 10ns]; ?: RectWave[inputb | width _ 12ns, tRise _ 4ns, tFall _ 4ns, tDelay _ 10ns]; ?: RectWave[$~inputb$ | OnLevel _ 0.0, OffLevel _ 5.0, width _ 12ns, tRise _ 4ns, tFall _ 4ns, tDelay _ 10ns]; ?: RectWave[inputc | width _ 12ns, tRise _ 4ns, tFall _ 4ns, tDelay _ 10ns]; ?: RectWave[$~inputc$ | OnLevel _ 0.0, OffLevel _ 5.0, width _ 12ns, tRise _ 4ns, tFall _ 4ns, tDelay _ 10ns]; }; PRINT[inputa, $~inputa$, inputb, $~inputb$, inputc, $~inputc$, Sum, $~Sum$, Carry, $~Carry$]; PLOT["CMOS Cascode FullAdder (nTrans: 8 lambda, pTrans: 4 lambda)", :1ns, -1, 6, powerSupply^: -1mA, inputa, $~inputa$, Carry, $~Carry$, Sum, $~Sum$]; RUN[tMax _ 50ns];