INSERT[D0LANG];
NOMIDASINIT;
TITLE[d0rnvr];
*last edited by CT June 10, 1979
SETTASK[17];

RV[REFR,77];	*memory refresh address

*The following registers hold the volatile state of the processor on a fault: 
RV[RXALU,76];	*ALU result and SALUF
RV[RXAPC,75];	*APCTask&APC
RV[RXCTASK,74];	*CTASK.NCIA
RV[RXPPB,73];	*Page,Parity,BootReason
RV[RXSTK,72];	*Stackpointer

RV[RTMP,71];	*temporary

*The following registers are used for D0-Midas communication (RTMP is also used):
RV[RWSTAT,70];	*status register
RV[RDATA,67];	*holds data

*FFault determines how faults will be treated when programs are running.  If it is
*zero, all faults will be reported to Midas.  If FFault is nonzero, the kernel will
*send control through location 120 when a fault occurs and PARITY # 0 (faults with
*PARITY = 0 are breakpoints).
RV[FFAULT,66];

*Registers between 360 and 367 are used by the Midas overlays.  The following 
*registers, used by WriteMI,  are also in this range.
RV[RADDR,65];

RV[RCNT,64];
RV[STACK4,64];

RV[RW0,63];
RV[STACK3,63];

RV[RW1,62];
RV[STACK2,62];

RV[STACK1,61];
RV[STACK0,60];



*Constants for Recv and Send
MC[RecvByte,12];
MC[RecvWord,16];
MC[SendByte,21];
MC[SendWord,25];

*The following are at fixed locations in Kernel.mc:
UserFault:	Return, AT[120];
NextCom:	Return, AT[7404];
Send:	Return, AT[7460];
Recv:	Return, AT[7464];

*d0rnvr overlay
*Reads the registers that are not changed by the kernel
OverlayArea:
	T _ MemSyndrome, at[7500];
	stack0 _ T, at[7501];
	T _ getrspec[127], at[7502]; *CycleControl(DBX[2:5], MWX), PCX,PCF
	stack1 _ T, at[7503];
	T _ getrspec[133], regshift, at[7504]; *DB,SB
	stack2 _ T, at[7505];
	T _ MNBR, at[7506];
	stack3 _ T, goto[NextCom], at[7507];	
	END;