There are two Memory Control board revisions, Ga and Gb (unfortunately, the
Gb boards are stamped "Gc".  This is a botch).
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On the Ga board, the changes are as follows:

lift pin a1.4
add wire from i5.8 to a1.4
add wire from i5.9 to d1.2 (PreloadMC1')
add wire from i5.10 to e9.13 (LDisableMC1')

pin f2.2 was lifted and grounded as a result of an earlier revision.  Remove the
ground and reconnect the pin in its original place (by plugging it into the
socket or replacing the chip if there is no socket).
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The change on the Gb revision board is harder, as there are no spare chips on
the board.  It is necessary to piggy-back a 74S10 chip on chip c1.  Call this chip
c1p.  Pins 7,9,10, and 14 of c1p should be connected to the corresponding pins on
chip c1, and the remaining pins should be bent up so that they do not contact
chip c1.  When this is done, the remainder of the change is as follows:

lift pin a1.4
add wire from i5.8 to a1.4
add wire from i5.9 to d1.2 (PreloadMC1')
add wire from i5.10 to e9.13 (LDisableMC1')

lift pin g9.5
add wire from g9.5 to c1p.8  (LDisableMC1t')
add wire from d1.1 to c1p.11 (PreloadMC1')



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