//************************************************************************************** //*** UTVFC2a.TST //*** Rev.H May 25.1979 //*** Rev.F January 29, 1979 //*** Rev.D2 November 28,1978 //*** Rev.B June29.1978 //*** V. Vysin //*** TEST 23.4 WAS CHANGED TO LOOK FOR "1" //*** BY FRANK VEST 8-10-80 //************************************************************************************** //************************************************************************************** //To include the following definition files in the compilation get "tester.d" get "UTVFC.d" //************************************************************************************** //{ODataM: Odata.00, Odata.01, Odata.02, Odata.03, Odata.04, Odata.05, Odata.06, Odata.07} //{ODataL: Odata.08, Odata.09, Odata.10, Odata.11, Odata.12, Odata.13, Odata.14, Odata.15} //{OData3: Odata.12, Odata.13, Odata.14, Odata.15} //************************************************************************************** // test 23 to check the wake-up logic on p.3 let Test23() be [ Start() // SubTest 23.0 to check out the Wake Request path Reset() // -Allow WU =0 Switch() // Allow WU was zero during the Switch NClk(1) EClock() // to clock WakeRequest ff Compare ("Wake Request ff",GetPinValue(52), 0,"should not set now",1) SetBusValue(8,139,138,137,136,135,134,133,129,#2 ); // Allow WU =1 SetBusValue(8,167,165,164,163,162,159,156,155,#200); // 2 to force AAR load ClkCR() // loads CR ClkStart() // loads SAR NClk(1) // loads AAR with 0 // In the following,we must write Switch subroutine explicitly,since we want AllowWU =1 during clocking of WakeRequest ff SetBusValue(4,135,134,133,129,#12 ); // SetCPhase WriteHorCont() NClk(1) // sets SetCPhase SetBusValue(4,135,134,133,129,2 ); // Switch only,we must drop setCPhase WriteHorCont() // writes into HeRAM NClk(1) // sets ControlPhase NClk(1) // Switch =1 now,SetCPhase=0 SetBusValue(4,135,134,133,129,0 ); // housekeeping WriteHorCont() // adddress 0 cleared again NClko(2) //Switch =0,ControlPhase=0,AllowWU=1 EClock() // to clock WakeRequest ff Compare ("Wake Request ff",GetPinValue(52), 1,"should have set here",2) SetPinValue(105,1 ); // MyTask =1,should have been... SetPinValue(105,0 ); // Compare ("Wake Request ff",GetPinValue(52), 1,"still up here",3) EClock() Compare ("Wake Request ff", GetPinValue(52), 1,"still up here",4) // To prepare now for the next test ! SetBusValue(8,167,165,164,163,162,159,156,155,#200 ); //OutD.0 =1 to keep IAR from loading * ClkStart() NClk(1) // 0 into AAR,AAR left in loading state SetBusValue(4,135,134,133,129,#12 ); // SetCPhase,PSwitch WriteHorCont() NClk(1) // sets SetCPhase NClk(1) // sets ControlPhase SetBusValue(4,135,134,133,129,2 ); // Switch only,we must drop setCPhase WriteHorCont() // writes into HeRAM NClk(1) // Switch =1 now,SetCPhase=0 SetBusValue(4,135,134,133,129,0 ); // housekeeping WriteHorCont() // adddress 0 cleared again NClko(2) EClock() Compare ("Wake Request ff",GetPinValue(52), 1,"should have set again",5) //Both WakeReq and WakeRequest ff are in good shape //SubTest 1 : to test wake-up logic on p.3 //{WakeP: WakeP1', WakeP2', WakeP3' } //{Wake: Wake1, Wake2, Wake3, Wake4} //{CTask: CTask.0, CTask.1, CTask.2, CTask.3} //foo represents the contents of PROM // let foo=table [ #17; #47; #207; #7; #33; #63; #223; #23; #112; //#142; #302; #102; #10; #40; #200; #0 ] //p1 represents the {WakeP} value for phase 1 let p1=table [#6; #6; #6; #6; #5; #5; #5; #5; #3; #3; #3; #3; #7; #7; #7; #7] //p2 represents the {WakeP} value for phase 2 let p2=table [#6; #5; #3; #7; #6; #5; #3; #7; #6; #5; #3; #7; #6; #5; #3; #7] //p3 represents the {Wake} value for phase 2 let p3=table [ #16; #14; #14; #14; #16; #14; #14; #14; #12; #10; #10; #10; #2; #0; #0; #0] for i=0 to #17 do [ SetBusOpen(3,3,4,5); // just to be sure it is disconnected SetCAddr(i) SetBusValue(4,29,93,30,94,i ); //this will make MyTask'=1 SetPinValue(64,0 ); // WakeRequest =1 EClock() //G1,G2,G3 now Phase1(msb),d gate will make dTx'=low &load Transmit =1;Phase1'=0 Compare("Transmit",GetPinValue(45),1," ff or '63 gate bad",6,i ) let sb1=p1!i let sb2=p2!i Compare("WakeP lines", GetBusValue(3,3,4,5), sb1, "slept over- probably the S32 gate",7,i) SetPinValue(64,1); //Phase1' still low (c gate closed) //Compare("GOTCHA..",{RUN},0," ",101) EClock() // Transmit will stay 1. Phase1' is now high ! Compare("Transmit",GetPinValue(45),1," ff or '63 gate bad",8,i ) Compare("Output Wake lines", GetBusValue(3,3,4,5), sb2, "something wrong with S38 driver",9,i) SetBusValue(4,29,93,30,94,#17-i ); //this will make MyTask'=0,close d gate SetPinValue(64,0); // closes c gate EClock() //will make Transmit =0 Compare("Transmit",GetPinValue(45),0,"shouldn't ",10,i ) //Phase1'=low now let sb3=p3!i SetPinValue(3,0) SetPinValue(4,0) SetPinValue(5,0) SetPinValue(64,1) EClock() //to clock G3 ph2 into v9 reg Compare("Wake lines", GetBusValue(4,59,58,57,56), sb3, "outa whakes-",11,i) //now,since sb3is not equ 17,dTx' will remain high EClock() Compare("Transmit",GetPinValue(45),0,"shouldn't ",11,i ) ] // This tested mainly the G123,G23,G3 ; locv9. Now one path in v10 - c gate - and Wake 4 remains untested SetCAddr(#17) ; //to make G1,G2,G3 =0 SetBusValue(4,29,93,30,94,#17 ); //this will make MyTask=0... opens d gate SetPinValue(64,0); //dTx'=0(d) EClock() //will load Transmit=1,Phase1'=0 ,Wake4=1 Compare("Transmit",GetPinValue(45),1,"-doesn't ",12 ) SetBusValue(4,29,93,30,94,#0 ); //this will make MyTask=1... closes d gate SetPinValue(3,1) SetPinValue(4,1) SetPinValue(5,1) SetPinValue(64,1) EClock() //Transmit=1(a),Phase1'=1,C gate causes dTx'=0 Compare("Transmit",GetPinValue(45),1,"-doesn't ",13) SetPinValue(3,0) SetPinValue(4,0) SetPinValue(5,0) EClock() //will load Transmit=1 (c was 1) Compare("Transmit",GetPinValue(45),1,"still ",14) SetPinValue(64,0 ); //dTx'=1,Phase1' still hi(blocks a) EClock() //will load Transmit=0 Compare("Transmit",GetPinValue(45),0,"shouldn't ",15) SetBusOpen(3,3,4,5); SetCAddr(#17) ; //allimportant;mustrestore MyTask &ICompar Compare("MyTask",GetPinValue(108),1,"Compare went berserk",16) Stop() ] //the priority logic is in good shape //************************************************************************************** //subroutines used for wake-up logic //SetCAddr(arg) //to set CAddr=arg // where arg=#0-#17 and SetCAddr(arg) be [ for caa=0 to 3 do [ let cab=arg & 1 SetPinValue(31,cab) SRClock() arg=arg rshift 1 ] ] //****************************************************************************** //UNKNOWN SIGNALS REQUIRED: