//**************************************************************************************
//***   UTVFC1a.TST

//***   Updated for Rev.H                          May 25.1979
//***   Updated for Rev.F                         January 24. 1979	
//***   Updated for Rev.D                         November 13.1978	
//***   Rev.B 			                             August 21.1978		
//***   V.Vysin                                          
//***   First Test program													    	   //**************************************************************************************


//**************************************************************************************
//To include the following definition files in the compilation
get "tester.d"
get "UTVFC.d"


//**************************************************************************************

//Test 13: To test Output Data Register (p.2) and Starting address Register (p.6)

//{ODataM:  Odata.00, Odata.01, Odata.02, Odata.03, Odata.04, Odata.05, Odata.06, Odata.07}
//{ODataL:  Odata.08, Odata.09, Odata.10, Odata.11, Odata.12, Odata.13, Odata.14, Odata.15}
//{OData0:  Odata.00, Odata.01, Odata.02, Odata.03}
//{OData1:  Odata.04, Odata.05, Odata.06, Odata.07}
//{OData2:  Odata.08, Odata.09, Odata.10, Odata.11}
//{OData3:  Odata.12, Odata.13, Odata.14, Odata.15}
//{Start:  Start.0, Start.1, Start.2, Start.3, Start.4, Start.5}
//{Buf0: Buf0B0, Buf0B1, Buf0B2, Buf0B3}
//{Buf1: Buf1B0, Buf1B1, Buf1B2, Buf1B3}
//{Buf2: Buf2B0, Buf2B1, Buf2B2, Buf2B3}
//{Buf3: Buf3B0, Buf3B1, Buf3B2, Buf3B3}
//{IAddr: Iaddr.0, Iaddr.1, Iaddr.2, Iaddr.3, Iaddr.4, Iaddr.5, Iaddr.6, Iaddr.7}


let Test13() be
[
    Start()
    for i=0 to 63 do        //only 6 bits can be checked on SAR
    [
       {ODataM}=i 
        EClock()
        ClkStart()
        Compare("Start",{Start}, i,"ODR or SAR went crazy or I did - 33/33/33 proposition ",1)    
    ]

//SubTest 13.1 to test the input shifter (p.8) and OData Register (p.2)
    
    SetOaddr(0)
    for i=0 to 15 do
    [
        SetOData(i)

        Compare("Buf0",{Buf0}, i ,"Input shifter u84 or u83 out of kilter",2,i)
        Compare("Buf1", {Buf1}, ( i +1) rem 16 ,"Input shifter u85 or u97 out of kilter",3,i)
        Compare("IBuf2", {Buf2}, ( i +2) rem 16 ,"Input shifter u86 or u98 out of kilter",4,i)
        Compare("Buf3", {Buf3}, ( i +4) rem 16 ,"Input shifter u87 or u99 out of kilter",5,i)
    ]
    
    SetOaddr(1)
    for i=0 to 15 do
    [
        SetOData(i)

        Compare("Buf0",{Buf0}, ( i +4 ) rem 16 ,"Input shifter u84 or u83 out of kilter",6,i)
        Compare("Buf1", {Buf1},  i  ,"Input shifter u85 or u97 out of kilter",7,i)
        Compare("Buf2", {Buf2}, ( i +1 ) rem 16 ,"Input shifter u86 or u98 out of kilter",8,i)
        Compare("Buf3", {Buf3}, ( i +2 ) rem 16 ,"Input shifter u87 or u99 out of kilter",9,i)
    ]
    SetOaddr(2)
    for i=0 to 15 do
    [
        SetOData(i)

        Compare("Buf0",{Buf0}, ( i +2 ) rem 16 ,"Input shifter u84 or u83 out of kilter",10,i)        
        Compare("Buf1", {Buf1}, ( i +4) rem 16  ,"Input shifter u85 or u97 out of kilter",11,i)
        Compare("Buf2", {Buf2},   i   , "Input shifter u86 or u98 out of kilter",12,i)
        Compare("Buf3", {Buf3}, ( i +1 ) rem 16 ,"Input shifter u87 or u99 out of kilter",13,i)
    ]
    SetOaddr(3)
    for i=0 to 15 do
    [
        SetOData(i)

        Compare("Buf0",{Buf0}, ( i +1 ) rem 16  ,"Input shifter u84 or u83 out of kilter",14,i)
        Compare("Buf1", {Buf1}, ( i +2 ) rem 16 ,"Input shifter u85 or u97 out of kilter",15,i)
        Compare("Buf2", {Buf2}, ( i +4) rem 16,"Input shifter u86 or u98 out of kilter",16,i)
        Compare("Buf3", {Buf3},   i   ,"Input shifter u87 or u99 out of kilter",17,i)
    ]
    Stop()
]
and let SetOData(i) be
[
     {OData0} =i
     {OData1} =(  i +1 ) rem 16
     {OData2} =(  i +2 ) rem 16
     {OData3} =(  i +4 ) rem 16
     EClock()
]

//After this test we can safely betcha that the Output Data Register and the Input Shifter are in top shape
//**************************************************************************************