//**************************************************************************************
//D0CS05.TST
//By B. Rosen and M. Thomson  							February 7, 1979
//Sub Test Program for D0 CS Module
//**************************************************************************************
get "d0cs.d"

//Edge pin and test connector signal busses available to this sub-test:

//{ALUA: ALUA.00,  ALUA.01,ALUA.02,ALUA.03,  ALUA.04,ALUA.05,ALUA.06,  ALUA.07,ALUA.08,ALUA.09,  ALUA.10,ALUA.11,ALUA.12,  ALUA.13,ALUA.14,ALUA.15}

//{CS-A': TrmCS-A.00'a,TrmCS-A.01'a,TrmCS-A.02'a,  TrmCS-A.03'a,TrmCS-A.04'a,TrmCS-A.05'a,  TrmCS-A.06'a,TrmCS-A.07'a,TrmCS-A.08'a,  TrmCS-A.09'a,TrmCS-A.10'a,CS-A.11'}

//{H2: H2.12,  H2.13,H2.14,H2.15}

//{R: R.00,  R.01,R.02,R.03,  R.04,R.05,R.06,  R.07,R.08,R.09,  R.10,R.11,R.12,  R.13,R.14,R.15}

//**************************************************************************************
//Test 9: Test Simple Read/Write Control Store

let Test9() be
[
	SpeakTest(9) //set initial conditions (see notes at end of D0CS.TST)

	let v = vec 64
	let str = v

//This test reads location #1000, which is preloaded by boot to a known constant (#125252).
//Then Write the complement of that into loc #1000 and verify that it worked by reading it out.

	str = "in first ReadCS"
//WaitForKey("Before Load APC (with #1000)")

	{ALUA} = #1000;		//First Instruction is an APC _ ALUA
	TwoClocks()		//Load APC (with #1000)
	RxAPC()
	Check("APC",{R}&#7777,#1000,str,9000)
//WaitForKey("Before read of first ReadCS, and after TwoClocks ")
//Address should be coming from APC (=#1000)
	EClock()		//1st cycle of read
	Check("CS-A",(not {CS-A'})&#7777,#1000,str,9001)

//WaitForKey("middle of first ReadCS")
	EClock()		//2nd cycle of read

//The data is #125252... Loaded by LoadBootRom
	RxCSData()
	Check("CSData",{R},#52525,str,9002)

//Now, the address should be coming from JA (=#422)
	EClock()		//first cycle of fetch for read
	Check("CS-A",(not {CS-A'})&#7777,#422,str,9003)
//WaitForKey("Now, the address should be coming from JA (=#422)")
//CSData should stick around
	EClock()		//t2 for read
	Check("CSData after fetch",{R},#52525,str,9004)

	str = "in first WriteCS"
	
	{ALUA} = #125252;	//Data to be written into CS
	//Check("APC",{R}&#7777,0,"1000 is correct TEST CASE ONLY  AFTER ALUA 1252525",9009)
	{H2} = #12;		//Data for extra 4 bits
	//Check("APC",{R}&#7777,0,"1000 is correct TEST CASE ONLY  AFTER H2= 12",9009)
	TwoClocks()		//CSIn_Data @423
	//Check("APC",{R}&#7777,0,"1000 is correct TEST CASE ONLY  AFTER TWO CLOCKS",9009)
	{ALUA} = #1000;		//Address to write it in
	//Check("APC",{R}&#7777,0,"1000 is correct TEST CASE ONLY  AFTER AFTER ALUA =1000",9009)
	TwoClocks()		//APC_Address @424
	//Check("APC",{R}&#7777,0,"1000 is correct TEST CASE ONLY  AFTER TWO CLOCKS",9009)
	RxAPC()
	//Check("APC",{R}&#7777,#1000,str,9005)

//address from APC
	EClock()		//Start the write @424
	Check("CS-A",(not {CS-A'})&#7777,#1000,str,9006)

//address from JA
	EClock()		//last cycle of write
	RxCSData()
	EClock()		//1st cycle of fetch after write
	{LoadAPC'xxx} = {LoadAPC'}
	RxCSData()
	Check("CS-A",(not {CS-A'})&#7777,#425,str,9007)

//WaitForKey("Middle of fetch after write")
	EClock()		//finish fetch

//We used the Restore option to Load APC, verify that output works
	Check("Restore'",{Restore'},0,str,9008)

	str = "in ReadCS after WriteCS"
	
	{ALUA} = #1000;		//Address to write it in
	{H2} = 0;		//select hi bits, ALUA is still #1000
	TwoClocks()		//APC_Address @425
	RxAPC()
	Check("APC",{R}&#7777,#1000,str,9009)
	//Check("APC",{R}&#7777,0,"1000 is correct TEST CASE ONLY",9009)

	EClock()		//start Read @426
	Check("CS-A",(not {CS-A'})&#7777,#1000,str,9010)
	//Check("CS-A",(not {CS-A'})&#7777,0,"1000 IS CORRECT TEST CASE ONLY",9010)

	EClock()		//finish read
	RxCSData()
	Check("CSData",{R},#125252,str,9011)

	EClock()		//start fetch
	Check("CS-A",(not {CS-A'})&#7777,#427,str,9012)
	
	{ALUA} = #132754;	//some bits get complemented
	EClock()		//finish fetch, CSIn_Data
	{ALUA} = #1000
	TwoClocks()		//APC_Address @427
	{H2} = 1;		//select low bits
	TwoClocks()		//Do WriteCS1 @430
	TwoClocks()		//finish fetch
	TwoClocks()		//APC_#1000 @431
	TwoClocks()		//Read part of ReadCS @432
	Check("CSData",{R},#132754,"in read after 2nd WriteCS",9013)

	{H2} = 0;		//select hi bits
	TwoClocks()		//finish read
	Check("CSData",{R},#132754,"in read after 2nd WriteCS",9014)

	{H2} = 3;		//select extra 4 bits
	TwoClocks()		//APC_1000 @433
	TwoClocks()		//ReadCS @434
	Check("CSData",{R},#122754,"in read of extra 4 bits",9015)

	TwoClocks()		//finish read
	
]