//**************************************************************************************
//D0CS06.TST
//By B. Rosen and M. Thomson  							February 7, 1979
//Sub Test Program for D0 CS Module
//**************************************************************************************
get "d0cs.d"

//Edge pin and test connector signal busses available to this sub-test:

//{ALUA: ALUA.00,  ALUA.01,ALUA.02,ALUA.03,  ALUA.04,ALUA.05,ALUA.06,  ALUA.07,ALUA.08,ALUA.09,  ALUA.10,ALUA.11,ALUA.12,  ALUA.13,ALUA.14,ALUA.15}

//{H2: H2.12,  H2.13,H2.14,H2.15}

//{R: R.00,  R.01,R.02,R.03,  R.04,R.05,R.06,  R.07,R.08,R.09,  R.10,R.11,R.12,  R.13,R.14,R.15}

//**************************************************************************************
//Test 10: Test TPC
let CheckCIA(sbaddr) be
[
	RxCIA()
	let curCIA = (not GetR()) & #7777
	if curCIA eq sbaddr then return
	Ws(FORMATN("*nIn Test 10, CIA was <B>, but should have been <B>",curCIA,sbaddr))
	while Endofs(keys) do []
	Gets(keys)

]

and Test10() be
[
	SpeakTest(10) //set initial conditions (see notes at end of D0CS.TST)

	let v = vec 64
	let str = v

//This test writes three instructions starting at location #5252
//The first does a Call to allow writing of TPC.
//The second does APC← in preparation for returning,
//and the third returns to tha main line code.
//The Routine does a Notify to these instructions with all tasks.
//Then it repeats the test using address #2524.

	SetALUA(#47)		//The data for the Call instruction
	SetH2(2)		//extra 4 bit data
	TwoClocks()		//CSIn← @435

	SetALUA(#5252)		//Address for Write
	TwoClocks()		//APC←Adr @436

	SetALUA(#27326)		//Data for WriteCS1
	FourClocks()		//WriteCS0&2 @437; Fetch after write and CSIn←data low

	SetALUA(#5252)		//same address
	FourClocks()		//APC ← adr @470; Write CS1 @440
	TwoClocks()		//fetch after write

	SetH2(0)		//read hi bits
	FourClocks()		//APC←addr @441; ReadCS @442
	RxCSData()
	Check("CSData",GetR(),#47,"reading Call inst 1st half",10000)

	TwoClocks()		//fetch after read

	SetALUA(#47)
	SetH2(2)
	TwoClocks()		//CSIn←data high 2nd word @443

	SetALUA(#5253)
	TwoClocks()		//APC←adr @444

	SetALUA(#21130)
	FourClocks()		//WriteCS0&2 @445; fetch after write and CSIn←data low

	SetALUA(#5253)
	FourClocks()		//APC←adr @471; WriteCS1 @446
	TwoClocks()		//fetch after write

	SetH2(1)		//read low bits
	FourClocks()		//APC←adr @447; ReadCS @450
	Check("CSData",GetR(),#21130,"reading APC← low bits",10001)

	TwoClocks()		//fetch after read

	SetALUA(#60)		//Data for 3rd word
	SetH2(2)
	TwoClocks()		//CSIn←data high 3rd word @451

	SetALUA(#5254)		//Address for 3rd word
	TwoClocks()		//APC←Adr @452

	SetALUA(#1401)
	FourClocks()		//WriteCS0&2 @453; fetch after write

	SetALUA(#5254)
	FourClocks()		//apc←adr @472; WriteCS1 @454
	TwoClocks()		//fetch after write

	SetH2(3)
	FourClocks()		//APC←adr @455; ReadCS @456
	Check("CSData",GetR(),#21401,"reading extra 4 bits of return",10002)

	TwoClocks()		//fetch after read

//Now do all tasks

	for i = 0 to 15 do
	[

//Test Start at address #457, which contains APC←ALUA
		RxCIA()
		Check("CIA",(not GetR())&#7777,#457,"in beginning of TPC test",10010,i)

		SetALUA((i lshift 12)+#5252)	//jump to Task i address #5252
		TwoClocks()		//APC← (@457)

//Should have loaded APC with Task i address #5252
		RxAPC()
		Check("APC/APCTask",GetR(),(i lshift 12)+#5252,"testing TPC",10011,i)

		TwoClocks()		//Return @460

//Should now be at Task i, address #5252
		RxCIA()
		Check("CIA",GetR() xor #7777,(i lshift 12)+#5252,"testing TPC",10012,i)

		 SetPinValue(74,0);	//During Cycle 0
		EClock()		//Call @5252
		 SetPinValue(74,GetPinValue(10))
		EClock()
		 SetPinValue(74,1)
		RxAPC()
		Check("APC",GetR(),(i lshift 12)+#5253,"after Call",10013,i)

//go around the loop for all tasks, then exit
		SetALUA(i eq 15? #461,#457)
		TwoClocks()		//APC← (@5253)
		Check("APC",GetR(),(i eq 15? #461,#457),"after loading APC in TPC check",10014,i)

		TwoClocks()		//Return (@5254)
	]

//Time to change Pages
	FourClocks()		//Page← @461; Goto 1435 @462

//Now do the same thing, but use address #2524
	RxCIA()
	Check("CIA",(not GetR())&#7777,#1435,"after loading Page in TPC test",10020)

	SetALUA(#47)		//CALL[2525]
	SetH2(1)
	TwoClocks()		//CSIn← @1435

CheckCIA(#1436)

	SetALUA(#2524)
	TwoClocks()		//APC←Adr @1436

CheckCIA(#1437)

	SetALUA(#27252)
	FourClocks()		//WriteCS0&2 @1437; Fetch after write and CSIn←data low

CheckCIA(#1470)

	SetALUA(#2524)
	FourClocks()		//apc ← adr @1470; Write CS1 @1440
	TwoClocks()		//fetch after write

CheckCIA(#1441)

	SetH2(0)
	FourClocks()		//APC←addr @1441; ReadCS @1442
	RxCSData()
	Check("CSData",GetR(),#47,"reading Call inst 1st half",10021)

	TwoClocks()		//fetch after read

CheckCIA(#1443)

	SetALUA(#47)		//APC←1457C,GOTO[2526]
	SetH2(1)
	TwoClocks()		//CSIn←data high 2nd word @1443

CheckCIA(#1444)

	SetALUA(#2525)
	TwoClocks()		//APC←adr @1444

//CheckCIA(#1445) -- can't do this.  TheByteCode register is enabled here,not CIA

	SetALUA(#21054)
	FourClocks()		//WriteCS0&2 @1445; fetch after write and CSIn←data low

CheckCIA(#1471)

	SetALUA(#2525)
	FourClocks()		//apc ← adr @1471; WriteCS1 @1446
	TwoClocks()		//fetch after write

CheckCIA(#1447)

	SetH2(1)
	FourClocks()		//APC←adr @1447; ReadCS @1450
	RxCSData()
	Check("CSData",GetR(),#21054,"reading APC← low bits",10022)

	TwoClocks()		//fetch after read

CheckCIA(#1451)

	SetALUA(#60)		//RETURN
	SetH2(1)
	TwoClocks()		//CSIn←data high 3rd word @1451

CheckCIA(#1452)

	SetALUA(#2526)
	TwoClocks()		//APC←Adr @1452

CheckCIA(#1453)

	SetALUA(#1401)
	FourClocks()		//WriteCS0&2 @1453; fetch after write

CheckCIA(#1472)

	SetALUA(#2526)
	FourClocks()		//apc ← adr @1472; WriteCS1 @1454
	TwoClocks()		//fetch after write

CheckCIA(#1455)

	SetH2(3)
	FourClocks()		//APC←adr @1455; ReadCS @1456
	RxCSData()
	Check("CSData",GetR(),#11401,"reading extra 4 bits of return",10023)

	TwoClocks()		//fetch after read

CheckCIA(#1457)

	for i = 0 to 15 do
	[
		RxCIA()
		Check("CIA",(not GetR())&#7777,#1457,"in beginning of TPC test",10030,i)

		SetALUA((i lshift 12)+#2524)	//jump to here
		TwoClocks()		//APC←
		RxAPC()
		Check("APC/APCTask",GetR(),(i lshift 12)+#2524,"Testing TPC",10231,i)

		TwoClocks()		//Return
		RxCIA()
		Check("CIA",GetR() xor #7777,(i lshift 12)+#2524,"testing TPC",10232,i)

		 SetPinValue(74,0);	//During Cycle 0
		EClock()		//Call 
		 SetPinValue(74,GetPinValue(10))
		EClock()
		RxAPC()
		Check("APC",GetR(),(i lshift 12)+#2525,"after Call",10233,i)

		SetALUA(i eq 15? #1400,#1457)
		 SetPinValue(74,1)
		TwoClocks()
		Check("APC",GetR(),(i eq 15? #1400,#1457),"after loading APC in TPC check",10034,i)

		TwoClocks()		//Return
	]
]


//The following procedures are employed to save code in the RUN and BR files:

and SetALUA(val) be  SetBusValue(16,229,165,228,164,211,147,204,140,102,38,101,37,83,19,82,18,val)

and SetH2(val) be  SetBusValue(4,76,12,75,11,val)

and GetR() = GetBusValue(16,233,169,232,168,209,145,208,144,104,40,103,39,89,25,87,23)


//UNKNOWN SIGNALS REQUIRED: