File: [Thyme]<Thyme>Cedar5.2>Top>ThymeBasics.thy
Last Edited by: SChen, July 31, 1984 8:08:25 pm PDT
Last Edited by: McCreight, March 8, 1985 2:53:52 pm PST
Diode: circuit[anode, cathode | Imax ← 1A, Io ← 10nA, Temp ← 25]
asserts[Imax > Io, Io > 0, Temp > -100] = {
diodeModel: model ← dcDiode[anode, cathode |
Io, 8.61707E-5*(Temp + 273.16), \(Imax/Io)];
junction: current[anode, cathode] ← diodeModel[0]
}; -- Diode
MosFet: circuit[gate, source, drain, bulk |
Lm ← 7.5, -- mask value of channel Length (micron)
Wm ← 50, -- mask value of channel width (micron)
As ← 1500, -- mask value of source area (micron**2)
Ad ← 1500, -- mask value of drain area (micron**2)
Ps ← 160, -- mask value of source perimeter (micron) better exclude the edge under the gate
Pd ← 160, -- mask value of drain perimeter (micron) better exclude the edge under the gate
Vfb ← -6.79025E-2, -- flat band voltage (v)
Na ← 1.222319E15, -- substrate doping Na (cm-3)
Tox ← 700, -- effective gate oxide thickness (A)
Lk1 ← -1.35683, -- coefficient for calculating K1. (micron)
Wk1 ← 0, -- coefficient for calculating K1. (micron)
K20 ← 1.371516E-2, -- coefficient for calculating K2. ()
Lk2 ← -4.96626, -- coefficient for calculating K2. (micron)
Wk2 ← 0, -- coefficient for calculating K2. (micron)
Etao ← 2.552937E-3, -- eta coefficient (), eta=Etao + nEta*Tox/Le
nEta ← 3.59803, -- eta coefficient ()
Un ← 831.342, -- effective channel mobility (cm2/v/sec)
Vo ← 14.8133, -- mobility modulation coefficient (v)
Lu ← -0.109125, -- mobility modulation coefficient (micron)
Ecrit ← 1.29325, -- Critical field strength (v/micron)
Lv ← 9.54961, -- coefficient for U1 (micron)
dL ← -0.387413, -- change in electrical channel Length from mask (micron)
dLComp ← 0, -- poly mask (gate length) compensation (micron)
dW ← 0, -- change in electrical channel width from mask (micron)
dWComp ← 1, -- dif mask (gate width) compensation (micron)
Xj2 ← 0.8, -- 2 times lateral diffusion, (micron)
TDegC ← 25, -- temparature (degree C)
NoCap ← 0, -- flag. if # 0, shut off gate capacitance.
Type ← 1, -- channel type (1: n channel, -1: p channel)
Jmax ← 100u, -- maximum current density allowed to go thru bs or bd junctions (A/u2)
Jo ← 5E-17, -- reverse saturation current density of the bs or bd junctions (A/u2)
value from J. Chen, March 8, 1985
the max forward bias allowed for the source-bulk and drain-bulk
junctions is MAX[2phif, (kT/q)*Ln[Jmax/Jo]]
Cj ← 3.1E-14, -- zero-bias substrate junction capacitance (F/micron**2)
Cjm ← 0, -- zero-bias perimeter substrate capacitance (F/micron)
Pb ← 0.866, -- junction built-in voltage (v)
M ← 0.1 -- off gate capacitance multiplier
]
asserts[As >= 0, Ad >= 0, Ps >= 0, Pd >= 0, Tox > 0, Un > 0, Ecrit > 0, Xj2 > 0, Jmax > Jo, Jo > 0, Cj >= 0, Cjm >= 0, M >= 0, M < 0.4] = {
Mos0: circuit[ | TDegK] asserts[TDegK > 200] = {
Mos1: circuit[ | Cox, TDegKBy300, Vt] = {
Mos2: circuit[ | Ni, K10, Le, We] asserts[Na > Ni, Le > .5, We > .5] = {
Mos3: circuit[ | TwoPhiF, K1, Eta, U0, Cgbo] asserts[Pb > TwoPhiF] = {
mosModel: model ← CSIM[gate, source, drain, bulk |
Vfb, -- vfb(V)
TwoPhiF, -- twoPhiF(V)
K1, -- k1(V^0.5)
K20*(1.0 + Lk2/Le + Wk2/We), -- k2()
Eta, -- eta()
(Un*1E8)*Cox*We/Le, -- betao(F/Vsec), > 0
U0, -- u0(1/V)
1E-7 MAX ((1/Le-1/Lv)/(2*Ecrit)), -- u1(1/V)
Cgbo*M, -- CgboM(F)
Cgbo*2.0/3.0, -- Cgbo23rds(F)
Cox*We*Xj2/2.0, -- Cov(F)
Cj*As + Cjm*Ps, -- Cbso(F)
Cj*Ad + Cjm*Pd, -- Cbdo(F)
Pb, -- phiB(V)
Jo*As, -- Io for source(A)
Jo*Ad, -- Io for drain(A)
Vt, -- kT/q(V)
(TwoPhiF/Vt) MIN \(Jmax/Jo), -- expMax()
NoCap, -- NoCap()
Type -- nChannel
];
i: current[drain, source] ← mosModel[0];
cgb: capacitor[gate, bulk] ← mosModel[1];
cgs: capacitor[gate, source] ← mosModel[2];
cgd: capacitor[gate, drain] ← mosModel[3];
cbs: capacitor[bulk, source] ← mosModel[4];
cbd: capacitor[bulk, drain] ← mosModel[5];
jbs: current[bulk, source] ← mosModel[6];
jbd: current[bulk, drain] ← mosModel[7]
}; -- Mos3
mos3: Mos3[ |
TwoPhiF ← 2.0*Vt*\(Na/Ni), -- (V),
K1 ← K10*(0.1 MAX (1.0 + Lk1/Le + Wk1/We)), -- (V^0.5)
Eta ← 1E-7 MAX (Etao + nEta*Tox/10000/Le), -- ()
U0 ← 1E-8 MAX (1.0/Vo*(1.0 + Lu/Le)), -- (1/V)
Cgbo ← Cox*Le*We -- (F)
]
}; -- Mos2
mos2: Mos2[ |
Ni ← 1.45E10*TDegKBy300*/TDegKBy300*^(1.12*(1-300/TDegK)/(2.0*Vt)), -- (#/cm3)
K10 ← /(3.20438E-19*Na*11.7*8.854215E-14)*1.0E-8/Cox, -- SqRt[2q*Esi*Na]/Cox (V^0.5)
Le ← Lm - Xj2 + dL + dLComp, -- (micron)
We ← Wm + dW + dWComp -- (micron)
]
}; -- Mos1
mos1: Mos1[ |
Cox ← 3.9*8.854215E-14/Tox, -- (F/cm/A)=(F/micron2)
TDegKBy300 ← TDegK/300.0, -- T/300 ()
Vt ← 8.61707E-5*TDegK -- (ev)
]
}; -- Mos0
mos0: Mos0[ | TDegK ← TDegC + 273.16]
}; -- MosFet
Diffusion: circuit[cathode, anode |
a ← 0, p ← 0, Cj ← 0, Cjm ← 0, Pb ← 0.866, TDegC ← 25, Jmax ← 100u, Jo ← 5p]
asserts[Cj >= 0, Cjm >= 0, TDegC > -75, Jmax > Jo, Jo > 0
, a >= 0, p >= 0 removed to allow hierarchical extractor to adjust capacitances
] = {
Dif: circuit[ | Vt] asserts[Pb > Vt] = {
DModel: model ← acDiode[cathode, anode |
Cj*a + Cjm*p, -- zero-bias capacitance of diode
Pb, -- junction built-in voltage (v)
Vt, -- kT/q
Jo*a, -- Io
(Pb/Vt) MIN \(Jmax/Jo)
];
C: capacitor[cathode, anode] ← DModel[0]; -- voltage dependent capacitance
I: current[cathode, anode] ← DModel[1] -- leakage current
}; -- Dif
dif: Dif[ | Vt ← 8.61707E-5*(TDegC + 273.16)]
}; -- Diffusion
Pulse: circuit[output | amplitude ← 5V, offset ← 0, period ← 10ns, width ← 5ns, tRise ← 2ns, tFall ← 2ns, tDelay ← 0] asserts[width < period, tRise + tFall < width] = {
pg: voltage[output, Gnd] ← PulseGen[amplitude + offset, offset, period, width, tRise, tFall, tDelay]
}; -- Pulse
RectWave: circuit[output | OnLevel ← 5V, OffLevel ← 0V, period ← 20ns, width ← 10ns, tRise ← 2ns, tFall ← 2ns, tDelay ← 0ns] asserts[width < period, tRise + tFall < width] = {
pg: voltage[output, Gnd] ← PulseGen[OnLevel, OffLevel, period, width, tRise, tFall, tDelay]
}; -- RectWave
OneShot: circuit[output | OnLevel ← 5V, OffLevel ← 0V, width ← 10ns, tRise ← 2ns, tFall ← 2ns, tDelay ← 0ns] asserts[tRise + tFall < width] = {
pg: voltage[output, Gnd] ← OneShotGen[OnLevel, OffLevel, width, tRise, tFall, tDelay]
}; -- OneShot
Step: circuit[output | OnLevel ← 5V, OffLevel ← 0V, tRise ← 5ns, tDelay ← 0ns]
asserts[tRise > 0] = {
pg: voltage[output, Gnd] ← StepGen[
OnLevel, OffLevel, tRise, tDelay]
}; -- Step
Change Log.
Barth, April 11, 1983 11:51 AM
SChen, June 11, 1983 7:03 PM
Tremain, July 29, 1983 12:33 PM