DIRECTORY SPARCArchitecture, SPARCManger; SPARCBreakpoint: CEDAR DEFINITIONS ~ { registerSaveArea: NAT ~ 64 * BYTES[SPARCArchitecture.SPARCContents]; PatchStruct: TYPE ~ MACHINE DEPENDENT RECORD [ closureCaller: ClosureCaller, manger: SPARCManger.Manger ]; ClosureCaller: TYPE ~ MACHINE DEPENDENT RECORD [ save: SPARCArchitecture.SPARCInstruction, callSaveRegs: SPARCArchitecture.SPARCInstruction, argSaveAreaOnce: SPARCArchitecture.SPARCInstruction, argHiClientData: SPARCArchitecture.SPARCInstruction, callClientProc: SPARCArchitecture.SPARCInstruction, argLoClientData: SPARCArchitecture.SPARCInstruction, callRestoreRegs: SPARCArchitecture.SPARCInstruction, argSaveAreaAgain: SPARCArchitecture.SPARCInstruction, restore: SPARCArchitecture.SPARCInstruction ]; }. V SPARCBreakpoint.mesa Copyright 1989, 1990 by Xerox Corporation. All rights reserved. Peter B. Kessler, March 29, 1990 10:30 am PST Patches can't be monitored, since the processor executes out of them. My accesses of the patches and the pc's executing in them are races. That isn't a problem because the pc's never get to the patches until I'm done setting them up (fortunately), and I don't clear the patch. Clearing a breakpoint is just putting the instruction back, since you can't tell when the pc (or several of them) are done with the patch (that's is a garbage collection problem). This closureCaller is for SPARC's: it includes pushing an extra register window to avoid some register saving and to allocate space for saving the rest of the registers. save %sp, -(spOffset+stackAllocationForCallee+registerSaveArea), %sp -- allocate a register window and a register save area. call _save_regs add %sp, spOffset+stackAllocationForCallee, %o0 -- save_regs(@registerSaveArea). sethi %hi(clientData), %o0 call clientProc or %lo(clientData), %o0 -- clientProc(clientData). call _restore_regs add %sp, spOffset + stackAllocationForCallee, %o0 -- restore_regs(@registerSaveArea). restore %sp, +(spOffset+stackAllocationForCallee+registerSaveArea), %sp -- deallocate the register window and register save area. Constants. 64 words for saving the rest of the registers. Types. Patches are self-describing, in that they include the address of the replaced instruction (in the header) and the replaced instruction (relocated into the patch). in the delay slot. in the delay slot. in the delay slot. FNewlineDelimiter codeK r7BJ-Jk JJ Junitln &KKKf"Helvetica" family clearTabStops 0.5 in flushLeft tabStop 2.25 in flushLeft tabStop 2.25 in restIndentPclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndentboo@DJPclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndentco79J CharProps8PostfixXeroxCharCodesPostfixXeroxCharCodesPclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndent PclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndent,/J PostfixXeroxCharCodesPclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndent "JPclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndentoz JPclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndent PclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndent JPclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndentJ8PostfixXeroxCharCodesPostfixXeroxCharCodesPclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndentPclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndent.1J PostfixXeroxCharCodesPclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndent#%PclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndent@GJPclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndent9;JPclearTabStops 0.75 in flushLeft tabStop 2.0 in flushLeft tabStop 0 bp restIndentKf"Helvetica" family clearTabStops 0.5 in flushLeft tabStop 2.25 in flushLeft tabStop 2.25 in restIndenthead "DKc..K  .KK KK  0K**K1144KK44K3344KK4455KK,,KKKL