DIRECTORY RS6000Architecture, RS6000Manger; RS6000Breakpoint: CEDAR DEFINITIONS ~ { registerSaveArea: NAT ~ 64 * BYTES[RS6000Architecture.RS6000Contents]; PatchStruct: TYPE ~ MACHINE DEPENDENT RECORD [ closureCaller: ClosureCaller, manger: RS6000Manger.Manger ]; ClosureCaller: TYPE ~ MACHINE DEPENDENT RECORD [ stu: RS6000Architecture.RS6000Instruction, stm: RS6000Architecture.RS6000Instruction, mfspr: RS6000Architecture.RS6000Instruction, st: RS6000Architecture.RS6000Instruction, liu0: RS6000Architecture.RS6000Instruction, oril0: RS6000Architecture.RS6000Instruction, st0: RS6000Architecture.RS6000Instruction, mfmq: RS6000Architecture.RS6000Instruction, mfxer: RS6000Architecture.RS6000Instruction, mfctr: RS6000Architecture.RS6000Instruction, mfcr: RS6000Architecture.RS6000Instruction, stm1: RS6000Architecture.RS6000Instruction, liu: RS6000Architecture.RS6000Instruction, oril: RS6000Architecture.RS6000Instruction, liu2: RS6000Architecture.RS6000Instruction, oril2: RS6000Architecture.RS6000Instruction, liu3: RS6000Architecture.RS6000Instruction, oril3: RS6000Architecture.RS6000Instruction, mtspr3: RS6000Architecture.RS6000Instruction, liu4: RS6000Architecture.RS6000Instruction, oril4: RS6000Architecture.RS6000Instruction, mtspr4: RS6000Architecture.RS6000Instruction, bctr: RS6000Architecture.RS6000Instruction, lm1: RS6000Architecture.RS6000Instruction, mtmq: RS6000Architecture.RS6000Instruction, mtxer: RS6000Architecture.RS6000Instruction, mtctr: RS6000Architecture.RS6000Instruction, mtcrf: RS6000Architecture.RS6000Instruction, l: RS6000Architecture.RS6000Instruction, mtspr: RS6000Architecture.RS6000Instruction, lm: RS6000Architecture.RS6000Instruction, ai: RS6000Architecture.RS6000Instruction ]; }. ศ RS6000Breakpoint.mesa Copyright ำ 1989, 1990, 1991, 1992, 1993 by Xerox Corporation. All rights reserved. Peter B. Kessler, March 29, 1990 10:30 am PST Udagawa, September 9, 1991 4:15 pm PDT Katsuyuki Komatsu March 5, 1992 5:43 pm PST Laurie Horton, February 24, 1993 8:11 pm PST Patches can't be monitored, since the processor executes out of them. My accesses of the patches and the pc's executing in them are races. That isn't a problem because the pc's never get to the patches until I'm done setting them up (fortunately), and I don't clear the patch. Clearing a breakpoint is just putting the instruction back, since you can't tell when the pc (or several of them) are done with the patch (that's is a garbage collection problem). This closureCaller is for RS6000's: stu r1, -392(r1) -- keep save area. mem(sp - 392) _ sp, sp _ sp - 392. stm r0, 120(r1) -- save all general registers into the save area. mfspr r0, LR -- return address goes r0; mflr r0 st r0, 388(r1) -- mem(sp + 388) _ LR. liu r0, %hi(breakAddress) -- r0 is breakAddress. oril r0, r0, %lo(breakAddress) st r0, 400(r1) -- mem(sp + 400) _ r0. --bl ._save_regs -- call the register save routine.(to r1+56's) mfspr MQ, 31 mfspr, XER, 30 mfspr CTR, 29 mfcr CR, 28 stm 28, 248(1) # save special registers liu r2, %hi(TOC) -- r2 is TOC. oril r2, r2, %lo(TOC) liu r3, %hi(clientData) -- r3 is a arg. oril r3, r3, %lo(clientData) --bl clientProc -- call client proc. liu r0, %hi(clientProc) -- r0 is entry address of clientProc. oril r0, r0, %lo(clientProc) mtspr CTR, r0 -- put entry address into Count Register. liu r0, %hi(restore) -- r0 is the return address. oril r0, r0, %lo(restore) mtspr LR, r0 -- put return address in Link Register. bctr -- branch to the address in the Count Register restore: --bl ._restore_regs -- call the register restore routine. lm 28, 248(1) # load special registers mtspr MQ, 31 mtspr XER, 30 mtspr CTR, 29 mtspr CRF, 0xff, 28 l r0, 388(r1) -- get return address to r0. mtspr LR, r0 -- LR _ mem(sp + 400). lm r0, 120(r1) -- restore general registers.(sp is r1!.) ai r1, r1, 392 -- sp _ sp + 392; sp adjust Constants. 64 words for saving the rest of the registers. Types. Patches are self-describing, in that they include the address of the replaced instruction (in the header) and the replaced instruction (relocated into the patch). bl: RS6000Architecture.RS6000Instruction, bl2: RS6000Architecture.RS6000Instruction, bl3: RS6000Architecture.RS6000Instruction, ส•NewlineDelimiter ™code™Kšœ ฯrœI™TJ™-J™&J™+J™,J™šฯk ˜ J˜J˜ —J˜—unitšะlnœžœž œ˜'K™K™หK–f"Helvetica" family clearTabStops 0.5 in flushLeft tabStop 2.25 in flushLeft tabStop 2.25 in restIndent˜™#K™HK™BK™0K™&K™0K™K™&K™K• CharProps8PostfixXeroxCharCodesPostfixXeroxCharCodes3šœฯo:™?K™ K™K™ K™ K™'K™K™K™K™'K™K™K™%K™=K™K™8K™1K™K™5K™5K™K™ K–8PostfixXeroxCharCodesPostfixXeroxCharCodes*šœ 4™9K™K™&K™ K™ K™ K™K™K™+K™$K™9K™+K™—head™ šœžœžœ$˜FKšฯc.™.——™K™ขš œ žœžœž œžœ˜.K˜K˜!K˜K˜š œžœžœž œžœ˜0Kšœ+˜+Kšœ+˜+Kšœ-˜-Kšœ*˜*Kšœ,˜,Kšœ-˜-Kšœ+˜+K™*K™K˜,K˜-K˜-K˜,K˜,K™K˜+Kšœ,˜,Kšœ,˜,Kšœ-˜-Kšœ+™+K˜,K˜-K˜.K˜,K˜-K˜.K˜,K™+K˜K˜+K˜,K˜-K˜-K˜-K˜K˜)Kšœ-˜-Kšœ*˜*Kšœ)˜)K˜K˜—K˜——L˜——…—์า