<<>> <> <> <> <> DIRECTORY IntCodeDefs USING [ApplyNode, AssignNode, BlockNode, CommentNode, ConstNode, DeclNode, GotoNode, Label, Location, LogicalId, Node, NodeList, Offset, OperNode, OperRep, Var, VarList], Rope USING [ROPE]; IntCodeStuff: CEDAR DEFINITIONS = BEGIN OPEN IntCodeDefs, Rope; <> CantHappen: PUBLIC SIGNAL; <> NotYetImplemented: PUBLIC SIGNAL; <> <> <> dummyLoc: READONLY Location; <> globalLinkInit: READONLY Node; allocOperNode: READONLY Node; freeOperNode: READONLY Node; addrOperNode: READONLY Node; subOperNode: READONLY Node; emptyReturn: READONLY Node; constant0: READONLY ConstNode; constant1: READONLY ConstNode; constant2: READONLY ConstNode; defaultNIL: READONLY ConstNode; <> BitsForArgList: PROC [args: NodeList] RETURNS [INT]; BitsForFormalArgList: PROC [vars: VarList] RETURNS [INT]; CopyVar: PROC [old: Var] RETURNS [Var]; GenAddr: PROC [var: Var] RETURNS [Node]; GenAnonVar: PROC [bits: INT, loc: Location ¬ NIL] RETURNS [Var]; GenApply: PROC [proc: Node, args: NodeList, bits: INT ¬ -1] RETURNS [ApplyNode]; GenAssign: PROC [lhs: Var, rhs: Node, bits: INT ¬ 0] RETURNS [AssignNode]; GenBlock: PROC [nodes: NodeList, bits: INT ¬ 0] RETURNS [BlockNode]; GenComment: PROC [msg: ROPE] RETURNS [CommentNode]; GenComposite: PROC [nodes: NodeList, bits: INT] RETURNS [Var]; GenConst: PROC [int: INT, bits: INT] RETURNS [ConstNode]; GenDecl: PROC [var: Var, init: Node] RETURNS [DeclNode]; GenDeref: PROC [node: Node, bits: INT, align: NAT] RETURNS [Var]; GenDummy: PROC [bits: INT] RETURNS [Var]; GenField: PROC [base: Node, offset: INT, bits: INT] RETURNS [Var]; GenFieldLoc: PROC [base: Node, offset: INT] RETURNS [Location]; GenFieldLocOfVar: PROC [var: Var, offset: INT] RETURNS [Location]; GenFieldOfDeref: PROC [ptr: Var, offset: Offset, bits: INT] RETURNS [Var]; GenXField: PROC [base: Node, offset: INT, bits: INT] RETURNS [Var]; <> GenXFieldLoc: PROC [base: Node, offset: INT] RETURNS [Location]; <> GenXFieldLocOfVar: PROC [var: Var, offset: INT] RETURNS [Location]; <> GenFree: PROC [var: Var] RETURNS [Node]; GenGoTo: PROC [label: Label] RETURNS [GotoNode]; GenLabelAddress: PROC [label: Label, direct: BOOL] RETURNS [Node]; GenLargeReturn: PROC [rets: NodeList, rtnVar: Var] RETURNS [Node]; GenOperNode: PROC [operRep: OperRep, bits: INT ¬ 0] RETURNS [OperNode]; GenReturn: PROC [rets: NodeList ¬ NIL] RETURNS [Node]; GenUpLevel: PROC [link: Var, reg: Var, format: LogicalId ¬ 0] RETURNS [Var]; IsError: PROC [node: Node] RETURNS [BOOL]; IsLive: PROC [node: Node, initialLive: BOOL ¬ TRUE] RETURNS [BOOL]; <> MarkAddressed: PROC [node: Node]; MarkAssigned: PROC [node: Node]; MarkUsed: PROC [node: Node]; NodeContains: PROC [node: Node, object: Node] RETURNS [BOOL]; NodeListCons2: PROC [node1, node2: Node] RETURNS [NodeList]; NodeListCons3: PROC [node1, node2, node3: Node] RETURNS [NodeList]; NodeListCons4: PROC [node1, node2, node3, node4: Node] RETURNS [NodeList]; NodeListCons5: PROC [node1, node2, node3, node4, node5: Node] RETURNS [NodeList]; PadComposite: PROC [argsRets: NodeList, logMinBits: NAT] RETURNS [Node]; StripNilCheck: PROC [node: Node] RETURNS [Node]; END.