SELECT instruction.GetSubOp31withoutOE[]
FROM
RS6000Architecture.SubOpFor31withoutOE.cmp => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.t => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.mfcr => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sl => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.cntlz => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.and => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.maskg => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.cmpl => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lux => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.andc => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.mfmsr => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lbzx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lbzux => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.nor => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.mtcrf => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.stx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.slq => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sle => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.stux => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sliq => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.stbx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sllq => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sleq => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.stbux => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.slliq => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lscbx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lhzx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lhzux => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.xor => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.mfspr => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lhax => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lhaux => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sthx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.orc => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sthux => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.or => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.mtspr => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.nand => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.mcrxr => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lsx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lbrx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lfsx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sr => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.rrib => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.maskir => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lfsux => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lsi => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lfdx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lfdux => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.stsx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.stbrx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.stfsx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.srq => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sre => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.stfsux => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sriq => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.stfdx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.srlq => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sreq => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.stfdux => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.srliq => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.lhbrx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sra => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.srai => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sthbrx => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sraq => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.srea => {relocated ¬ NoRelocate[instruction];};
RS6000Architecture.SubOpFor31withoutOE.sraiq => {relocated ¬ NoRelocate[instruction];};