Heading:qjk40(635)
How to install extra Ethernet interfaces in an Altoy756qjk40
Page Numbers: Yes  X: 527  Y: 10.5"qjk40
Inter-Office Memorandumz18592l4445y762\f5b
To	Alto Gateway Project	Date	July 31, 1978z18592l4445d2998e21(0,65535)(1,4445)(5,11684)(6,14146)\f1 2f0t2 1t0 20t6 1f1t0 4f0t7 1t0
From	David Boggs	Location	Palo Altoz18592l4445d2998y716e25\f1 4f0t2 1t0 11t6 1f1t0 8f0t7 1t0
Subject	How to install extra Ethernet	Organization	Parcz18592l4445d2998e25\f1 7f0t2 1t0 29t6 1f1t0 12f0t7 1t0
Interfaces in an Altoz18592l4445
XEROX       z18592l508y644e14(2116)\f2 5f0
Filed on: [Ivy]<Portola>ExtraEther.bravoe30
e10
This memo describes how to install up to two extra Ethernet interfaces in an Alto.  This can easily be done to any vintage Alto though these instructions are for an Alto II.  The hardware configuration of your Alto determines which card slots and tasks you use, so this memo is not a complete recipe - you must understand what you are doing.e12jk40
Mechanical considerationse12jk40\b25B
An extra Ethernet interface may be installed in any spare processor slot, 15-20.  There are no uncommitted connector mounting holes on the rear bulkhead, but the TRICON radial cable hole is the right size and will work for the first extra interface.  Be sure to clearly label both ends of the cable.e12jk40\162f1 6f0
Board modificationse12jk40\b19B
An Ethernet board used in one of the extra positions needs several modifications.  The ICmd & OCmd flip flop inputs must be disconnected from BUS[14-15]: e12jk40\87f1 4f0 3f1 4f0 44f1 10f0
cut the trace at 35-2
cut the trace at 35-14,l4269e12jk40
and brought out to edge pins so that they can be set by jumpers:e12jk40
add a wire from 35-2 to edge pin 98 (OCmd)
add a wire from 35-14 to edge pin 97 (ICmd).l4269e12jk40\37f1 4f0 40f1 4f0
The signal IBusy, which is brought out to an edge pin for debugging, collides with TaskA', soe12jk40\11f1 5f0
cut the trace at edge pin 113.l4269e12jk40
To prevent the extra boards from responding to the emulator's ReadSerialNumber function, and to avoid driving the signal SIO from more than one place,e12jk40\62f1 16f0 43f1 3f0
remove the 3205 at position 9.l4269e12jk40
If this is an Alto II, replace the following chips with schottky versions:e12jk40
7402 at position 40
7404 at position 55
74157 at position 48
7438s at positions 14, 15, 24, 25, 26.l4269e12jk40
A modified board will work in a normal Ethernet slot if you replace the 3205 at position 9 and jumper pin 14-98 to 14-95 and pin 14-97 to 14-94 on the backplane.e12jk40
Backplane modificationse12jk40\b23B
An Ethernet board needs some signals which are not present on the standard processor bus slots.  These are available on the corresponding pins of slot 14, the standard Ethernet.e12jk40
SysClk'	12
AuSysClk	72
_KData'	111
EmAct'	99
SWakMRT'	68l4269e12jk40(0,9344)(1,65535)(5,65535)(6,65535)
In addition, two BUS bits must be connected to the Cmd flip flops, and a task must be assigned by connecting the board's Active and Wakeup signals.  These are discussed below.e12jk40\17f1 3f0 31f1 3f0 67f1 6f0 5f1 6f0
Note that SReset' and EStop are not wired on extra interfaces.  SReset is the signal which boots the machine, and it is sufficient for the standard Ethernet to yank on it; besides, SIO decoding on the extra boards is disabled.  EStop is the signal which stops the clocks for one cycle to fix a long path in the interface.  Installing Schottky chips in the path makes it unnecessary to do this.e12jk40\10f1 7f0 5f1 5f0 37f1 6f0 111f1 3f0 44f1 5f0
Host addressese12jk40\b14B
The host address logic in an extra Ethernet interface is disabled by removing the 3205, so the SIO instruction returns the address set by the jumpers on the standard Ethernet interface in slot 14.  Host jumpers on the extra slots are not required.e12jk40\95f1 3f0
Tasks, SIO bits, and Page 1 locationse12jk40(2116)\b7f1 3f0 27B
The choice of task for an extra Ethernet interface is invisible to the emulator level program.  An active interface consumes about 15% of an Alto, which is low enough that any of the four uncommitted tasks available on the backplane will work.  Pick one of them and wire its wakeup and active pins on the control board (slot 11) to EtherWakeup' (pin 103) and EtherActive' (pin 100) on the extra Ethernet board.  The table below gives the pin numbers on the control board for the uncommitted tasks.e12jk40\332f1 12f0 15f1 12f0
Task	Wakeup'	Active'l4269e12jk40(0,5824)(1,8114)
1	113	119
2	58	52
5	60	102
6	104	101l4768e4jk40(0,6336)(1,8467)
The microcode for the extra interfaces use page 1 locations 630-640B and 642-652B in the same way that the standard Ethernet uses 600-610B.  The extra interfaces may be assigned different host addresses than the standard one by putting different numbers in 640B and 652B, but as mentioned above, SIO returns the address set on the backplane of the standard interface so you must invent a new way to get the additional addresses.  Unless there is a compelling reason, I recommend that additional interfaces use the same host address as the standard one.e12jk40(2116)\67f1 1f0 12f1 1f0 56f1 1f0 122f1 1f0 8f1 1f0 26f1 3f0
The emulator task signals an Ether task by placing a value on BUS and executing the SIO emulator function.  Each Ethernet interface checks two BUS bits during an SIO and wakes up its task if either bit is one.  The task then performs some action which ends up modifying its page 1 locations.  Thus the software must know the correspondence between SIO bits and page 1 locations.  I recommend the following correspondence: e12jk40\62f1 3f0 19f1 3f0 56f1 3f0 16f1 3f0 183f1 3f0
SIO bits	page 1l4339e12jk40(0,7328)(1,11456)\f1 3f0
14 & 15	600-610B	(standard Ethernet interface)
12 & 13	630-640B
10 & 11	642-651Bl4269e4jk40(0,7056)(1,10592)\15f1 1f0 46f1 1f0 16f1 1f0
where the MSB of the pair sets the ICmd FF by being wired to pin 97, and the LSB sets the OCmd FF by being wired to pin 98.  The MESA and BCPL PUP packages assume this; if you do it differently you forfeit compatibility.  BUS[0-15] are on pins 80-95.e12jk40(2116)\10f1 3f0 22f1 4f0 1f1 2f0 35f1 3f0 10f1 4f0 1f1 2f0 32f1 4f0 5f1 4f0 1f1 3f0 76f1 3f0
Microcodee12jk40\b9B
Files ExtraEther1.mu and ExtraEther2.mu contain copies of the Ether microcode which use page 1 locations 630-640B and 642-652B respectively.  These files do not define task numbers or R-registers to be used.  File ExtraEther.mu is an example of how to do this, assigning tasks 2 and 3, and registers 14-17B, and adding enough other definitions to make a stand-alone ram image for two extra Ethernets.  These files are stored in [Ivy]<Portola>GatewayMc.dme12jk40\112f1 1f0 12f1 1f0 58f1 1f0 120f1 1f0
Note that the registers must be in the first group of 32 since the Ether hardware can't be ram-related (function and bus sources collide with the ram).  This is a problem for MESA, since only one R-register is available.  Another one can be freed by rewriting the memory refresh task to eliminate its use of ClockTemp.  To get the next two, the cursor must be sacrificed.  This involves deleting all references to CurX and CurData from the MRT, Cursor, and DVT tasks.e12jk40\175f1 4f0 17f1 2f0 110f1 9f0 97f1 4f0 5f1 7f0 10f1 3f0 14f1 3f0
Revision Historye12jk40\b16B
July 20, 1978e12jk40
First release.e12jk40
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