Page Numbers: Yes X: 530 Y: 10.5" First Page: 1 Not-on-first-page
Margins: Top: 1.3" Bottom: 1"
Heading: Not-on-first-page
Dorado MicroassemblerEdward R. Fiala21 July 1980
DORADO
MICROASSEMBLER
21 July 1980
by
Edward Fiala
Xerox Palo Alto Research Center
3333 Coyote Hill Road
Palo Alto, California, 94304
Filed on:[Ivy]<DoradoDocs>DoradoMicroassembler.Press
Sources on:[Ivy]<DoradoSource>DoradoMicroassembler.Dm
This manual describes the Dorado microassembly language, based upon the 8 October 1979 release of the Dorado Hardware Manual, and hardware changes up to the release date of this manual.
This manual is the property of Xerox Corporation and is to be used solely for evaluative purposes. No part thereof may be reproduced, stored in a retrieval system, transmitted, disseminated, or disclosed to others in any form or by any means without prior written permission from Xerox.

TABLE OF CONTENTS
l.Preliminaries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.Assembly Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.Debugging Microprograms . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.Cross Reference Listings . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6.Comments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7.Conditional Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
8.Simplified Parsing Rules . . . . . . . . . . . . . . . . . . . . . . . . . .11
9.Statements Controlling Assembly . . . . . . . . . . . . . . . . . . . .12
10.Forward References . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
11.Integers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
12.Repeat Statements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
13.Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
14.Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
15.Small Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
16.Assembling Base Register Names . . . . . . . . . . . . . . . . . . . .18
17.Assembling Device Numbers for TIOA . . . . . . . . . . . . . . . .19
18.Symbolic Use of Task Numbers . . . . . . . . . . . . . . . . . . . . .19
19.Assembling Data for RM . . . . . . . . . . . . . . . . . . . . . . . . . .20
20.Assembling Data for STK . . . . . . . . . . . . . . . . . . . . . . . . .21
21.Assembling Data Items In the Instruction Memory . . . . . . . .21
22.Assembling for IFUM . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
23.Assembling for ALUFM . . . . . . . . . . . . . . . . . . . . . . . . . .23
24.General Comments on Instruction Statements . . . . . . . . . . .25
25.Small Constant Clauses . . . . . . . . . . . . . . . . . . . . . . . . . . .27
26.A Clauses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
27.B Clauses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
28.RM and STK Clauses . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
29.Shifter Clauses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
30.ALU Clauses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
31.Memory References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
32.Standalone Functions, Block, and Breakpoint . . . . . . . . . . . .40
33.Branching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
33.1.What the Branch Hardware Does . . . . . . . . . . . . . . .41
33.2.Branch Clauses . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
33.3.Dispatch Clauses . . . . . . . . . . . . . . . . . . . . . . . . . . .44
34.Placement Declarations . . . . . . . . . . . . . . . . . . . . . . . . . . .45
35.Microcode Overlays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
36.Instruction Memory Read-Write . . . . . . . . . . . . . . . . . . . . .48
37.Reading and Loading Task PC’s . . . . . . . . . . . . . . . . . . . . .49
38.Divide and Multiply . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
39.Programming Tips and Examples . . . . . . . . . . . . . . . . . . . .52
A1.MicroD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53
A2.Recent Hardware and Assembler Changes . . . . . . . . . . . . . .62

1. Preliminaries
The Dorado microprogramming language is implemented as a set of definitions on top of the machine-independent assembler Micro; Micro is an Alto program, so assemblies are carried out either on an Alto or on some other machine (e.g., D0 or Dorado) emulating an Alto. The assembly language is based upon the machine description in the 8 October 1979 release of Dorado Hardware Manual and several hardware changes that have occurred since then.
Files referred to in this manual are as follows:
DocumentationWhen Using the Assembler
[Ivy]<DoradoDocs>[Ivy]<DoradoSource>
DoradoManual-A.PressD1Lang.Mc
DoradoManual-B.PressD1Alu.Mc
DoradoManual-Figs.Press[Maxc1]<Alto>
DoradoMidasManual.PressMicro.Run
[Maxc1]<AltoDocs>MicroD.Run
Micro.Press
The assembly language is defined by D1Lang.Mc and D1Alu.Mc; you must modify D1Alu.Mc as discussed later. I have tried to make D1Lang.Mc and this documentation complete, so you should not need to refer to the Micro manual or study D1Lang for further details, except where noted here.
Micro flushes Bravo trailers, so you can use Bravo formatting if you want to. However, the cross reference program, MCross, which is expected to produce primary microprogram documentation, does not handle Bravo trailers. Also, line numbers in Micro error messages may be more difficult to correlate with source statements because of the line breaks inserted by Bravo’s hardcopy command. I advise against Bravo formatting for these reasons.
I recommend use of Gacha8 (i.e., a relatively small fixed-pitch font) for printing program listings, and use of Gacha10.Al for editing source files with Bravo. The smaller font is desirable because some statements will be long, and a smaller font will allow you to get these on one text line. Bravo tab stops should be set at precisely 8 character intervals for identical tabulation in Bravo and MCross.
The two relevant lines in USER.CM for BRAVO are:
FONT:0 GACHA 8 GACHA 10
TABS: Standard tab width = 1795
You will probably want to delete the other Font lines for Bravo in User.Cm.
I also recommend that you read the hardware manual through once or twice and begin programming with Figure 1 of the hardware manual in front of you for reference.
Note: All arithmetic in this manual and in Dorado microassembler source files is in octal.
2. Assembly Procedures
D1Alu.Mc must be edited to define the ALU definitions for your program as discussed in the "Assembling For ALUFM" section. Suppose that you put these definitions on AluDefs.Mc. Then a microassembly is accomplished as follows:
Micro/L D1Lang AluDefs Source1 Source2 ... SourceN
This causes the source files "D1Lang.Mc", "AluDefs.Mc", "Source1.Mc", ..., "SourceN.Mc" to be assembled. The global switch "/L" causes an expanded assembly listing to be produced on "SourceN.LS"; if "/L" is omitted, no listing is made. The assembler also outputs "SourceN.Dib" (intermediate binary and addresses), "SourceN.Er" (error messages, which are also printed on the display), and "SourceN.St" (the Micro symbol table after assembling SourceN.Mc).
In other words, Micro assembles a sequence of source files with default extension ".Mc" and outputs four files whose extensions are ".Dib", ".Er", ".Ls", and ".St". The default name for these is the name of the last source file to be assembled. Direct output to particular files as follows:
Micro Sys/L/B D1Lang AluDefs Source1 ... SourceN
causes the four output files to be "Sys.Ls", "Sys.St", "Sys.Dib", and "Sys.Er."
A summary of local and global Micro switches is as follows:
Global:/LProduce an expanded listing of the output
/NSuppress .Mb file output
/UConvert text in all source files to upper case
/OOmit .St file
Local:/RRecover from symbol table file
/LPut expanded listing on named file
/BPut binary output on named file with extension .Dib. Default symbol table (.St) and error listing (.Er) to named file.
/EPut error listing on named file
/SPut symbol table on named file
/UConvert text in named file to upper case
Assemblies are slow--it should take about 9 minutes to assemble a 400010-instruction program.
INSERT[file] statements, described later, can be put in source files so you don’t have to type as many source files on the command line. However, this will slow assembly because each INSERT makes a separate call on the directory lookup code (about 1 second), but all names on the command line are looked up at once. A better shortcut is to define command files to carry out your assemblies.
After obtaining an error-free assembly from Micro, you must postprocess the .Dib file with MicroD to transform it appropriately for loading by Midas. This is accomplished as follows:
MicroD Sys
MicroD displays a progress message while churning away, and requires about 55 seconds to process a 400010-instruction file (longer when large listings are produced). The local "/O" switch directs the output to the named file rather than to the last-named input file (default extension .Mb), so:
MicroD NewSys/O Sys
puts the output of MicroD for the input file Sys.Dib onto NewSys.Mb.
In this example, there is only one input file for MicroD (Sys.Dib)--it is also possible to assemble source files independently using the symbol table (.St) file produced by Micro to establish a basis point for further assemblies, thereby reducing assembly time. For example, you can build a AluDefs.St file as follows:
Micro/U D1Lang AluDefs
Then do all further assemblies as follows:
Micro/O/U AluDefs/R Sys/B Source1 ... SourceN
MicroD AluDefs Sys
Preassembling D1Lang and AluDefs in this way saves about 10 seconds of assembly time.
MicroD can relocate code in IM (but not in any other memories). On very large programs, such as the system microcode, it is possible to proceed as follows:
Micro/U D1Lang AluDefs RegDefs
Micro/O/U RegDefs/R Source1
Micro/O/U RegDefs/R Source2
...
Micro/O/U RegDefs/R SourceN
MicroD Sys/O RegDefs Source1 Source2 ... SourceN
where Source1 ... SourceN may assemble IM and IFUM locations but must not assemble any RM or ALUFM locations; i.e., forward and external references are permitted only in instruction branch clauses and in target addresses for IFUM locations, so everything else must be predefined in RegDefs.St. One advantage of this method is that Source1 ... SourceN can be independently maintained without having to reassemble the entire system for every change; another advantage is that it avoids symbol table overflow--some large programs are near to overflowing at present. However, whenever any RM or ALUFM assignments change, it will still be necessary to reassemble everything, and when everything is reassembled the total assembly time will be about 9 minutes rather than 6 minutes.
Note that you do not need anything special in your source files to declare labels which are exported (defined here, used elsewhere) or imported (used here, defined elsewhere). Micro assumes that any undefined branch symbol is meant to be imported (but gives you the list just so you can check), and MicroD assumes that all labels are exported. MicroD also discards all but the last definition of a name (e.g., the symbol "ILC" is defined in every file as the address of the last microinstruction).
MicroD produces up to seven output files, depending upon the local and global switches specified on the command line. The name for these files is determined as discussed earlier, followed by the extensions given below (i.e., Sys.Mb, Sys.Dls, ... , SysOccupied.Mc):
.MbBinary output consisting of address symbols for debugging and binary data for various memories; this file is produced unless the global /P switch on the command line suppresses it.
.DlsListing file always produced--it contains the Executive command line and all strings printed on the display while MicroD is running (i.e., progress information and error messages); this is followed by a table showing the number of free locations on each page of IM, and by a list of data and address symbols in each memory (which can be modified by various global and local switches discussed below).
.RegsRegister allocation listing produced if the global /R switch is specified; it lists in numerical order RM locations and address symbols associated with each.
.CSMapControl store map produced when the global /M switch is specified; when MicroD input consists of a number of modules (i.e., of .Dib files), the .CSMap file will show for each page in the control store (i.e., each page in IMX) the number of words in each module allocated on that page and the number of free locations in the page.
.CSChartA file showing which .Dib file contained the instruction at each real address, sorted by real address; this is produced only when the global /E switch is specified and is intended for hardware debugging with a logic analyzer.
.absDLSA file giving the correlation between real and imaginary IM addresses, sorted by real address; this is produced only when the global /H switch is specified and is intended for hardware debugging with a logic analyzer.
Occupied.McA file which can be assembled to reserve all locations occupied by the current image. It contains IMReserve declarations for every location into which MicroD has placed an instruction. The intent is that this file be used when building overlays to run on top of the current mage.
A summary of the local and global MicroD switches is as follows:
Global:/AList only absolutely-placed IM locations
/CConcise listing--list everything except octal contents of IM
/DDebug--print a large amount of debugging information
/EProduce a .CSChart file (of every location)
/HProduce a .absDLS file (useful for hardware debugging)
/IIgnore OnPage
/KUnused for Dorado
/MProduce a .CSMap file
/NNo listing--IM contents are not listed
/OProduce the Occupied.Mc output file containing IMReserve statements for all locations filled by MicroD
/PPrint only--suppresses all MicroD actions and just lists all .Dib files
/RProduce a .Regs file
/SList symbols for all memories (except Version, RVRel, Disp, IMLock, and IMMask, which are consumed by MicroD). /N prevents /S from listing IM symbols.
/TTrace--print a trace of calls on the storage allocator
/XExternal--allow references to unbound symbols in the .Mb file
Local:/AList only absolutely-placed IM locations--overrides global setting
/CConcise listing--overrides global setting
/LList everything--overrides global setting
/NNo IM listing--overrides global setting
/OOutput file
/VVersion number
/ZSpecifies scratch file to use instead of Swatee
Global switches are usually specified on the command line as "MicroD/nmo Sys/O ..." but MicroD accepts "MicroD Sys/O ... ~/nmo" as an alternative. This alternate form is useful with command files because it allows varying switches to be specified at the end of the command line. In other words, if one has prepared a command file Foo.Cm containing "MicroD/n Sys/O ...," the "~" feature allows variant switches via "@Foo ~/nmo" to the alto Executive.
Only one of the /A, /C, or /N global switches, which control additional material printed in the .Dls file, can be meaningful--when none of these switches is specified a verbose (/L) listing will be produced. The /A, /C, /L, and /N local switches overrule the global switches for a particular file. The ordering of these is as follows: /L is most verbose; /A prints less information than /L; /C prints all other memories but not IM; and /N prints neither IM nor other memory information.
MicroD outputs a ".Mb" file, consisting of blocks of data that can be loaded into various Dorado memories and of addresses associated with particular locations in memories. The memories are as follows:
IM44-bit x 10000-word instruction memory
(placement and other information brings total width to 140 bits)
RM20-bit x 400-word register bank memory
STK20-bit x 400-word stack memory
IFUM40-bit x 2000-word instruction fetch unit memory
ALUFM10-bit x 20-word ALU control memory
BR40-bit x 40-word base register memory (only for debugging symbols)
BRX40-bit x 4-word MemBX-relative base register memory (only for debugging symbols)
DEVICE20-bit x 400-word fake memory for device address symbols
TASKN20-bit x 20-word fake memory for task number symbols
In addition, four other memories called VERSION, RVREL, IMLOCK, and IMMASK are produced by Micro and consumed by MicroD, but these are invisible to the programmer. Only the data contents for IM and IFUM are affected by the operation of MicroD; address symbols and data for other memories are transmitted to the output file exactly as they are received by MicroD.
There are at present no facilities provided for microcode overlays. However, such a facility will be provided eventually.
3. Error Messages
During assembly, error messages and assembly progress messages are output to both the display and the error file.
Micro error messages are in one of two forms, like the following:
... source statement ...
218...error message
-or-
... source statement ...
TAG+39...error message
The first example indicates an error on the 218th line of the source file. This form is used for errors that precede the first label in the file. The second form is used afterwards, indicating an error on the 39th line after the label "TAG".
Note that the line count measures <cr>’s in the source, so if you are using Bravo formatting in the source files, you may have trouble distinguishing <cr>’s from line breaks inserted by Bravo’s hardcopy command.
The "TITLE" statement in each source outputs a message of the form:
1...title...IM.address.=341
This message indicates that the assembler has started working on that source file. "IM.address.=.341" indicates that the first IM location assembled in this source file is the 341st in the microprogram. This will be helpful in correlating source statements with error messages from the postprocessor, MicroD.
The most common assembly errors result from references to undefined symbols and from setting a single instruction field multiple times (e.g., attempting to use the FF field twice in one instruction). I do not believe that you will have any trouble figuring out what these messages mean, so no comments are offered here.
After Micro has finished an assembly, it returns to the Executive leaving a message like "Time: 22 seconds; 0 errors, 0 warnings, 20007 words free" in the system window. Only when the error or warning counts are non-zero do you have to look in the .Er file for detailed information about errors.
MicroD error messages are intended to be self-explanatory.
4. Debugging Microprograms
There is no simulator for Dorado. Microprograms are debugged directly on the hardware using facilities provided by Midas. To debug microprograms you will need to load Midas and its auxiliary files as discussed in the Midas manual.
Midas facilities consist of a number of hardware tests, a loader for Dorado microprograms, set/clear breakpoints, start, step, or halt the machine, and examine and modify storage. Addresses defined during assembly may be examined on the display. Midas works with both the imaginary IM addresses defined in your source program and with the absolute IM addresses assigned to instructions by MicroD.
5. Cross Reference Listings
The cross-reference program for Dorado microprograms is a Tenex subsystem called MCross. It is significantly easier to maintain large microprograms when cross-reference listings are available, so you are advised to store your sources on a Tenex directory and make your listings using MCross.
Obviously, you can only use MCross if you have a timesharing account on Maxc. If not, you will have to do without cross-reference listings until MCross is implemented on Alto (no one is working on that now).
A typical dialog with MCross is given below. The program is more-or-less self-documenting and will give you a list of its commands if you type "?".
@MCROSS
Output File:LPT:GACHA8.EP
Machine:D(selects Dorado syntax)
Action:U(convert to upper case)
Action:N(read def’s, no printout)
File:D1LANG<esc>
Action:CL(read def’s, produce cross ref)
File:Src1<esc>
Action:CL
File:Src2<esc>
Action:P(print operation usage statistics)
Action:G(print global cross reference)
Action:E
@
6. Comments
Micro ignores all non-printing characters and Bravo trailers. This means that you can freely use spaces, tabs, and carriage returns to format your file for readability without in any way affecting the meaning of the statements.
Comments are handled as follows:
"*" begins a comment terminated by carriage return.
"%" begins a comment terminated by the next "%". This is used for multi-line comments.
";" terminates a statement. Note that if you omit the ";" terminating a statement, and, for example, put a "*" to begin a comment, the same statement will be continued on the next line.
Micro’s COMCHAR feature provides one method of producing multi-statement conditional assemblies (This method is now obsolete). COMCHAR is used as follows. Suppose you want to have conditional assemblies based on whether the microcode is being assembled for a 4K or 16K Dorado configuration. To do this define "~" as the comment character for 4K (i.e., COMCHAR[~];) and "!" as the comment character for 16K. Then in the source files:
*! 4K configuration only
...statements for 4K configuration...
*!
*~ 16K configuration only
...statements for 16K configuration...
*~
In other words, "*" followed by the comment character is equivalent to "%" and is terminated by the carriage return following its next occurrence.
7. Conditional Assembly
D1Lang defines IF, ELSEIF, ELSE, ENDIF macros for doing multi-statement conditional assemblies; IF’s may be nested up to four levels deep. The syntax for these is as follows:
:IF[Display];
... statements assembled if Display is non-zero...
:ELSEIF[OldDisplay];
... statements assembled if Display is zero and OldDisplay non-zero...
:ELSE;
... statements assembled if both Display and OldDisplay are zero...
:ENDIF;
Note that each of the conditional names must be preceded by ":"; the implementation of these is discussed in the Micro manual. Any number of ELSEIF’s may be used after an IF, followed by an optional ELSE and a mandatory ENDIF. The arguments to IF and ELSEIF must be integers.
Warning: The :IF, :ELSEIF, :ELSE, and :ENDIF must be the first characters in a statement. In the following example:
FlshCore:
:IF[MappedStorage];
... statements ...
:ELSE;
... statements ...
:ENDIF;
":IF" is illegal because, due to the "FlshCore" label, ":IF" are not the first characters of a statement.
8. Simplified Parsing Rules
After comments, false conditionals, and non-printing characters are stripped out, the rest of the text forms statements.
Statements are terminated by ";". You can have as many statements as you want on a text line, and you can spread statements over as many text lines as you want. Statements may be indefinitely long.
However, the size of Micro’s statement buffer limits statements to 500-decimal characters at any one time. If this is exceeded at any time during the assembly of a statement, an error message is output. Since horrendous macro expansions occur during instruction assembly, it is possible that instruction statements may overflow. If this occurs, the size of the statement buffer can be expanded (Tell me.).
The special characters in statements are:
"[" and "]"for enclosing builtin, macro, field, memory, and address argument lists;
"(" and ")"for causing nested evaluation;
"←"as the final character of the token to its left;
":"to put the address to its left into the symbol table with value equal to the current location and current memory, and as the first character of a statement to be evaluated even in the false arm of a conditional;
","separates clauses or arguments;
";"separates statements;
"#"#1, #2, etc., are the formal parameters inside macro definitions;
"01234567"are number components (all arithmetic in octal).
All other printing characters are ordinary symbol constituents, so it is perfectly ok to have symbols containing "+", "-", "&", etc. which would be syntactically significant in other languages. Also, don’t forget that blanks, carriage returns, and tabs are syntactically meaningless (flushed by the prescan), so "T+Q" = "T + Q", each of which is a single symbol.
The debugger Midas requires all address symbols to be upper case; since both Micro and MCross have switches that convert all source file characters to upper case, you can follow your own capitalization conventions but must convert to upper case at assembly time using the /U switch. Experience suggests that consistent capitalization conventions are desirable, although there is not much agreement on exactly what conventions should be used. In this manual I follow capitalization conventions which you may consider as a non-binding proposal. My convention is as follows:
The first letter of each word is capitalized.
When a symbol consists of several words run together, the first letter of each subword is capitalized (e.g., "FreezeBC," "StkP").
When a symbol is formed by running together the first letters from several words, then these are all capitalized (e.g., "MC").
Micro builtins, memory names, and important assembly directives that should stand out in the source, such as TITLE, END, IF, etc. are all capitals.
Midas also limits address symbols to 13 characters in length; if you assemble longer addresses, you will still be able to load and run your program with Midas, but you won’t be able to examine symbols longer than 13 characters. Although 13-character addresses are acceptable, Midas must fit an address symbol, an offset, and the value at that location in a screen window; if total text length exceeds window width then the offset and name are truncated to fit, producing a confusing display image. For this reason, ordinarily limit IM addresses to 9 characters to avoid truncation.
Also, avoid using any of the characters "=," "#," "+," "-," and "!" in address symbols; these are syntactically significant to Midas and may cause trouble when debugging. Finally, avoid defining symbols that end with the character "@"; the internal symbols in D0Lang.Mc by convention end with "@," so you might have name conflicts with reserved words if you also define symbols ending with "@."
Statements are divided into clauses separated by commas, which are evaluated right-to-left. An indefinite number of clauses may appear in a statement.
Examples of clauses are:
NAME,
NAME[ARG1,ARG2,...,ARGN],
FOO←FOO1←FOO2←P+Q+1,P+Q+1 is referred to as a "source" while FOO←, FOO1←, and FOO2← are "destinations" or "sinks".
P←STEMP,
NAME[N1[N2[ARG]],ARG2]←FOO[X],
Further discussion about clause evaluation is postponed until later.
9. Statements Controlling Assembly
Each source file should begin with a TITLE statement as follows:
:TITLE[Source1];
The TITLE statement:
a.prints a message in the .Er file and on the display which will help you correlate subsequent error messages with source statements which caused them;
b.puts the assembler in "Emulator" mode and "Subroutine" mode (discussed later).
The final file to be assembled should be terminated with an END statement:
:END[Source1];
Currently, the END statement assembles "MIDASBREAK: Return, BreakPoint, At[7776]" and prints some statistical information about the program on the .Er file. MIDASBREAK is needed to implement the subroutine-call feature which you might use when debugging with Midas. When you are going to independently assemble a number of source files, and then load the .Dib files into MicroD, you should put an END statement only on the last file to be loaded.
Note that the ":" preceding TITLE and END is optional; inserting the ":" will cause statement evaluation even in the false arm of a conditional, so an appropriate message can be printed to help detect :IF’s unmatched by :ENDIF’s. The "Source1" argument to :END is also optional.
You may at any place in the program include an INSERT statement:
INSERT[SourceX];
This is equivalent to the text of the file SourceX.MC.
The message printed on the .Er file by TITLE is most helpful in correlating subsequent error messages if any INSERT statements occur either before the TITLE statement or at the end of the file (before the END statement). INSERT works ok anywhere, but it might be harder to figure out which statement suffered an error if you deviate from this recommendation.
The hardware has some operations executed differently for emulator, fault, and input/output tasks. For example, stack and ←ID operations are only available to the emulator task; Map← and Flush← only to the emulator and fault tasks; IOFetch← and IOStore← only to io tasks. The TITLE statement initializes to assemble for the emulator task. This can be done independently by the statement:
Set[XTask,0];
The assembler bases its error-checking upon the value of XTask. The programmer should correctly set XTask to 0 (emulator), 17 (fault task), or some value in the range 1 to 16 (io tasks).
In the event you request a listing by putting "/L" in the Micro command line, the exact stuff printed is determined by declarations that can be put anywhere in your program.
D1Lang selects verbose listing output. However, you will generally not want to print this listing. The MicroD listing is normally more useful during debugging.
If you want to modify the default listing control in D1Lang for any reason, you can do this using the LIST statement, as follows:
LIST[memory,mode];
where the "memory" may be any of the ones given earlier and the mode the OR of the following:
20(TAG) nnnnnn nnnnnn (octal value printout in 16-bit units)
10alphabetically-ordered list of address symbols
4numerically-ordered list of address symbols
2(TAG) FF←3, JCN←4, etc (list of field stores)
1(TAG) nnnn nnnn nnnn (octal value printout)
Note: The listing output will be incorrect in fields affected by forward references (i.e., references to as yet undefined addresses); such fields will be incorrectly listed as containing their default values.
Micro has a recently added TRACEMODE builtin which you may prefer to use instead of an assembly listing for the purposes of debugging complicated macros. TRACEMODE allows symbol table insertions and macro expansions to be printed in the .Er file. See the Micro manual for details about TRACEMODE.
When an instruction statement does not contain a branch clause, the assembler (i.e., MicroD) must cause it to branch to the next instruction inline. For programs which nearly fill the microstore, it is important to allow MicroD flexibility in locating the next instruction. If it is permissible to smash the Link register, then MicroD has more locations to choose from and might be able to pack the microstore tighter.
To tell the assembler whether or not it is ok to smash Link, two declaration statements are provided:
Subroutine;
tells the assembler that it must not smash Link. The TITLE statement puts the assembler in Subroutine mode.
Top Level;
tells the assembler that it is ok to smash Link.
There is more detailed discussion on these in the section on branching.
10. Forward References
Micro and D1Lang have an extremely limited ability to handle forward references. The only legal forward references are to instruction labels from either branch clauses or IFUM assembly statements. Anything else must be defined before it is referenced.
11. Integers
Micro provides builtin operations for manipulating 20-bit assembly-time integers. These have nothing to do with code generation or storage for any memories. Integers are used to implement assembly switches such as XTask and to control Repeat statements. The operations given in the table below are included here for completeness, but hopefully you will not have to use any of them except SET:
Set[NAME,OCT]Defines NAME as an integer with value OCT. Changes the value of NAME if already defined.
Select[i,C0,...,Cn]i is an integer 0 to n. Evaluates C0 if i = 0, C1 if i = 1, etc.
Add[O1,...,O8]Sum of up to 8 integers O1 ... O8.
Sub[O1, ... ,O8]O1-O2-...-O8
IFE[O1,O2,C1,C2]Evaluates clause C1 if O1 equals O2, else C2.
IFG[O1,O2,C1,C2]Evaluates C1 if O1 greater than O2, else C2.
Not[O1]Ones complement of O1.
Or[O1,O2,...,O8]Inclusive ’OR’ of up to 8 integers.
Xor[O1,O2,...,O8]Exclusive ’OR’ of up to 8 integers.
And[O1,O2,...,O8]’AND’ of up to 8 integers.
LShift[O1,N]O1 lshift N
RShift[O1,N]O1 rshift N
OCT in the Set[NAME,OCT] clause, may be any expression which evaluates to an integer, e.g.:
Set[NAME, Add[Not[X], And[Y,Z,3], W]]
where W, X, Y, and Z are integers.
If you want to do arithmetic on an address, then it must be converted to an integer using the IP operator, e.g.:
IP[FOO]takes the integer part of the address FOO
Add[3,IP[FOO]]is legal
Add[3,FOO]is illegal
Some restrictions on doing arithmetic on IM addresses are discussed later.
12. Repeat Statements
The assortment of macros and junk in the D1Lang file successfully conceals Micro’s complicated macro, neutral, memory, field, and address stuff for ordinary use of the assembler.
However, using the Repeat builtin may require you to understand underlying machinery--in a diagnostic you might want to assemble a large block of instructions differing only a little bit from each other, and you want to avoid typing the same instruction over and over.
Instruction statements are assembled relative to a location counter called ILC. This is originally set to 0 and is bumped every time an instruction is assembled. To do a Repeat, you must directly reference ILC as follows:
Repeat[20,ILC[(...instruction statement...)]];
This would assemble the instruction 20 times. If you want to be bumping some field in the instruction each time, you would proceed as follows:
Set[X,0];
Repeat[20,ILC[(Set[X,Add[X,1]],...instruction statement...)]];
where the instruction statement would use X someplace.
For a complicated Repeat, you may have to know details in D1Lang. For this you will have to delve into it and figure out how things work.
13. Parameters
Parameters are special assembly-time data objects that you may define as building blocks from which constants, small constants, RM, or IM data may be constructed. Three macros define parameters:
MP[NAME,OCT];makes a parameter of NAME with value OCT
SP[NAME,P1,...,P8];makes NAME a parameter equal to the sum of P1,...,P8, which are parameters or integers.
NSP[NAME,P1,...,P8];makes NAME a parameter equal to the ones complement of the sum of P1,...,P8, which are parameters or integers.
The parameter "NAME" is defined by the integer "NAME!" (The "!" is a symbol constituent added so that a constant, small constant, or RM address can have an identical NAME.), so it ok to use the NAME again as an address, small constant, or constant. However, you cannot use it for more than one of these.
14. Constants
The hardware allows a constant to be generated on B that is the 10-bit FF field of the instruction in either the left or right half of the 20-bit data path and either 0 or 377 in the other 10-bit byte.
"Literal" constants such as "322C", "177422C", "32400C", or "32377C" may be inserted in instructions without previous definition.
Negative constants such as "-1C", "-55C", etc. are also legal.
Alternatively, constants may be constructed from parameters, integers, or addresses using the following macros:
MC[NAME,P1,...,P8];defines NAME as a constant whose value is the sum of P1...P8 (integers or parameters).
NMC[NAME,P1,...,P8];defines NAME as the ones complement of the sum.
Warning: The two macros above also define NAME as a parameter. You must not redefine a parameter with the same name as a constant because the binding of the constant is to the name of its associated parameter (i.e., to "NAME!"), not to its value. In other words, if you redefine a parameter with the same name as a constant, you will redefine the constant also.
Because the definition of a constant also defines a parameter of the same name, it is possible to cascade a number of constant definitions to create various useful values. Here is an example of how several constant definitions can be cascaded:
MC[B0,100000];
MC[B1,40000];
MC[B2,20000];
MC[B01,B0,B1];
MC[B02,B01,B2];
Occasionally, you may wish to create a constant whose value is an arithmetic expression or an expression including an address in RM. Here are several examples of ways to do this:
IP[RAddr]CA constant whose value is an RM address
Add[3,LShift[X,4]]CA constant whose value is a function of the integer X