[_CD8_]<doradosource>DMesaSources.dm!86>DMesaMiscDisp.mc

*-----------------------------------------------------------
Title[DMesaMiscDisp.mc...December 12, 1985 10:40 AM...Willie-Sue];
* Dispatch tables for all MISC opcodes, and definitions of undefined MISC opcodes.
*-----------------------------------------------------------

%
There are 400B MISC opcodes, divided into 20B groups of 20B each.

The entry point for each MISC opcode is declared by including the clause
MiscTable[xxx]
in the first microinstruction of the code implementing opcode xxx.

Upon entry, T contains TOS (if there is one) and StkP has been advanced
in preparation for pushing a result. Routines that do not push a result
must decrement StkP. Exit is via the usual IFUNextN.

All unimplemented MISC opcodes cause a trap to occur. In Alto mode,
a KFCB[sUnimplemented] is executed. (Exception: floating point opcodes trap
by putting the offending opcode in OTPReg and executing a KFCB[137B].)

In PrincOps mode, a Cedar opcode trap is executed if an OpTrapTable has been
set up; otherwise a standard PrincOps TrapZero[sUnimplemented] is executed.
(See DMesaFaults.mc for more details.) The microcode implementing a MISC
opcode may conditionally trap (e.g., for illegal arguments) by branching
to OpcodeTrap.

Adding or removing MISC opcodes requires changing the dispatch tables.
This is why these tables are in a separate file, which may be renamed and
edited when non-standard MISC opcodes are introduced.

To add a new MISC opcode to an existing group, delete the statement
MiscOpcodeUnimplemented[xxx];
below, and add the corresponding
MiscTable[xxx]
in the appropriate source file.

To add a new group of MISC opcodes, change
MiscGroupUnimplemented[xxx];
to:MiscGroupImplemented[xxx];
below, where xxx is the first opcode of the group (i.e., a multiple of 20B).
Then, for each opcode in the group NOT being defined, add the statement
MiscOpcodeUnimplemented[xxx];

Note: the MiscOpcodeUnimplemented[xxx] statments may appear either below or in
another source file. They appear below when the unimplemented opcodes in
a group are unrelated, but in a separate source file when they are related to
other opcodes that are implemented in that source file.
%

TopLevel;
Set[XTask, IP[EMU]];

*-----------------------------------------------------------
* First-level (group) dispatch table:
*-----------------------------------------------------------

M[MiscGroupImplemented,
(T← StackNoUfl&+1, BranchExternal[Or[
Select[RShift[#1, 6], MT0Loc, MT1Loc, MT2Loc, MT3Loc],
1]])];
M[MiscGroupUnimplemented, (Branch[Misc377])];

MiscDispatch: DispTable[20],
MiscGroupImplemented[000];* Miscellaneous operations
MiscGroupImplemented[020];* Floating point
MiscGroupUnimplemented[040];
:If[AltoMode];********** Alto version **********
MiscGroupUnimplemented[060];
:Else;******** PrincOps version ********
MiscGroupImplemented[060];* Cedar allocator/GC
:EndIf;**********************************
MiscGroupImplemented[100];* More miscellaneous operations
MiscGroupUnimplemented[120];
:If[AltoMode];********** Alto version **********
MiscGroupUnimplemented[140];
:Else;******** PrincOps version ********
MiscGroupImplemented[140];* Cedar 5.0 reference-counting opcodes
:EndIf;**********************************
MiscGroupUnimplemented[160];
MiscGroupUnimplemented[200];
MiscGroupUnimplemented[220];
MiscGroupImplemented[240];* Dorado-only operations
MiscGroupUnimplemented[260];
MiscGroupUnimplemented[300];
MiscGroupUnimplemented[320];
MiscGroupUnimplemented[340];
MiscGroupUnimplemented[360];

*-----------------------------------------------------------
* Unimplemented MISC opcodes:
*-----------------------------------------------------------

:If[AltoMode];********** Alto version **********
MiscOpcodeUnimplemented[002];* Read RAM
MiscOpcodeUnimplemented[004];* IO reset
MiscOpcodeUnimplemented[010];* Set maintenance panel
MiscOpcodeUnimplemented[014];* XferL
MiscOpcodeUnimplemented[015];* TextBlt

MiscOpcodeUnimplemented[244];
MiscOpcodeUnimplemented[245];
MiscOpcodeUnimplemented[247];* ResetEther
MiscOpcodeUnimplemented[250];* Boot
MiscOpcodeUnimplemented[254];* ResetDisk
MiscOpcodeUnimplemented[255];* SetIntervalTimer

:Else;******** PrincOps version ********
MiscOpcodeUnimplemented[002];* Read RAM
MiscOpcodeUnimplemented[004];* IO reset
MiscOpcodeUnimplemented[014];* XferL
MiscOpcodeUnimplemented[015];* TextBlt
* MiscOpcodeUnimplemented[017];* Set default partition

MiscOpcodeUnimplemented[244];
MiscOpcodeUnimplemented[245];
MiscOpcodeUnimplemented[250];* Boot (obsolete)
:EndIf;**********************************

MiscOpcodeUnimplemented[101];
MiscOpcodeUnimplemented[103];
MiscOpcodeUnimplemented[105];
MiscOpcodeUnimplemented[106];
MiscOpcodeUnimplemented[107];
MiscOpcodeUnimplemented[110];
MiscOpcodeUnimplemented[111];
MiscOpcodeUnimplemented[112];
MiscOpcodeUnimplemented[113];
MiscOpcodeUnimplemented[114];
MiscOpcodeUnimplemented[115];
MiscOpcodeUnimplemented[116];
MiscOpcodeUnimplemented[117];

* Special entry to squash pending dispatch when an entire
* group is unimplemented.
Misc377:
MiscOpcodeUnimplemented[377];

* This doesn’t really belong here, but...
* Cedar opcodes no longer defined in Alto/Mesa system:
:If[AltoMode];********** Alto version **********
UndefOp[MOpASSIGNREF];
UndefOp[MOpASSIGNREFNEW];
:EndIf;**********************************

*-----------------------------------------------------------
:IF[NOT[AltoMode]];
TestConfigX: MiscTable[17],
* pushes Config, ShC, PgsPerMod, ModMask;
*-----------------------------------------------------------
%ModMask← NOT (Config’);
T← LDF[ModMask, 2, 2];* Storage chip size = 2↑(12 + 2*T)
T← DPF[T, 2, 11];* ShC count ← 2*T
MPageX← T-(ShC← T)-1;
PgsPerMod← 400C;* 4K chips give 400B pages/module
PgsPerMod← ShiftNoMask[PgsPerMod]; * LCY[R, R, 2*n]
ModMask← LSH[ModMask, 10];* Left-justify the module-present bits
ModMask← (ModMask) AND (170000C);
%
KnowRbase[RTemp1];
T ← NOT (Config’);
Stack&+1 ← T;
RTemp1 ← T;
T ← LDF[T, 2, 2];