//D1Prin3Y.bcpl -- DMux addresses 40B to 67B printed here.
//	Last edited: 13 September 1979

get "d1.d"
manifest [ get "d1dmux.d" ]

external [
// MASM
	@WssCSS; WssCS1; PutsCS1

// MCMD
	WnsCS1

// MPRINS
	PrinV0; NWss; PrinV1; NWss1

// MPATTERN
	@PATTERN

// D1PRIN2
	PrintWrdByt

// Defined here
	PrintDMXy
]


let PrintDMXy(Addr) be
[	switchon Addr into
	[
case dPVAH:
	PrinV0("ProcVA[4:15]",PATTERN); return
case dPVAL:
	PrinV0("ProcVA[16:31]",PATTERN); return
case dMAPAD:
	PrinV0("MapAd[0:8]",PATTERN); return
case dHIT:
	NWss("MiscPCHP ",#400)
	PrinV0("ColVic[0:1]",(PATTERN rshift 6) & 3)
	NWss(" HitColVA.par",#40)
	NWss(" HitColDirty")
	NWss(" Hita"); return
case dHOLD:
	NWss("WantCHdly ",#10000)
	NWss("MiscHold ")
	NWss("MDhold ")
	NWss("RefHold ")
	NWss("BLretry ")
	NWss("AwasFree ")
	NWss("Dbusy ")
	NWss1("DbufBusy ")
	NWss1("AtookST ")
	NWss1("SomeExtHold ")
	NWss1("Afree ")
	NWss1("StartMap ")
	NWss1("AwantsMapFS "); return
case dPAIR:
	NWss("Store_InA ",#100000)
	NWss("IoStoreInA ")
	NWss("Map_InPair ")
	NWss("FlushInA ")
	NWss("PrefetchInA ")
	NWss("IfuRefInA ")
	NWss("IoRefInA ")
	NWss1("CacheRefInA ")
	NWss1("PrivRefInPair ",#100)
	NWss1("VicInPair ")
	NWss1("FSinPair ")
	NWss1("bEcHasA ")
	NWss1("KillIfuRef ")
	NWss1("_PrVArow ")
	NWss1("PairFull "); return
case dPIPEAD:
	PrinV0("PipeAd[0:3]",PATTERN<<nib0)
	WssCSS(selecton (PATTERN rshift 10) & 3 into
	  [ case 0: ", und. cache config"
	    case 1: ", 16K cache, no parity"
	    case 2: ", 16K cache with parity"
	    case 3: ", 4K cache"
	  ] )
	WssCSS(selecton (PATTERN rshift 8) & 3 into
	  [ case 0: ", und. page size"
	    case 1: ", 4k pages"
	    case 2: ", 1k pages"
	    case 3: ", 256-word pages"
	  ] )
	return
case dMEMD0:
	NWss("SinD.00 ",#100000)
	NWss("CD.00 ")
	NWss("D0in.00 ")
	NWss("D1in.00 ")
	NWss("EcSout.00 ")
	NWss1("D.00 ",#200)
	NWss1("dMD.00 ")
	NWss1("Fout.00 "); return
case dDAD:
	PrinV0("Dad[0:1]f",PATTERN rshift 14)
	PrinV0(", Dad[2:8]c",(PATTERN rshift 7) & 177B)
	PrinV0(", Dad.09",(PATTERN rshift 6) & 1)
	PrinV0(", Dad[10:12]c",(PATTERN rshift 3) & 7B)
	PrinV0(", Dad[10:12]b",PATTERN & 7B)
	PrinV1("(Col",PATTERN rshift 14)
	PrinV1(", row",(PATTERN rshift 6) & 377B)
	PATTERN = (PATTERN & 7B) lshift 1
	WssCS1(", word "); WnsCS1(PATTERN); WssCS1(" or ")
	WnsCS1(PATTERN+1); PutsCS1($)); return
case dFD:
	NWss("F_D ",#100000)
	NWss("D_Dbuf ")
	NWss("Sout_D ")
	NWss("Fout_D ")
	NWss("D_CD ")
	NWss("Md_D ")
	NWss("MakeMDM_D ")
	NWss1("bFastD_Dbuf ")
	NWss1("Dbuf_ ")
	NWss1("DadH_ ")
	NWss1("DontLoad1 ")
	NWss1("GenPh1 ")
	NWss1("DontWriteMDM "); return
case dEC:
	NWss("StartEcChk ",#4000)
	NWss("StartEcGen ")
	PrinV0("EcInD[0:1]",(PATTERN rshift 7) & 3B)
	NWss(" WordInError",#100)
	NWss1("DisableEc ")
	NWss1("ChkPh1 ")
	NWss1("ChkPH4 ")
	NWss1("ChkLastPh6 ")
	NWss1("DoubleError ")
	NWss1("ChkErrEn "); return
case dTSYN:
	PrinV0("tSyn[0:6]",PATTERN rshift 9)
	PrinV0(" tSyn7x",(PATTERN rshift 8) & 1); return
case dMDMAD:
	PrinV0("MDMad[0:3]",PATTERN xor 17B); return
case dDADE:
	NWss("D0ACE'c ",#100000)
	NWss("D0BCE'c ")
	NWss("D1ACE'c ")
	NWss("D1BCE'c ")
	NWss("WriteD0'e ")
	NWss("WriteD1'd "); return
case dMCR:
	NWss("dVA_Vic ",#100000)
	NWss("ForceDirtyMiss ")
	NWss("UseMcrV ")
	PrinV0("Victim[0:1]",(PATTERN rshift 11) & 3)
	PrinV0(" NextV[0:1]",(PATTERN rshift 9) & 3)
	NWss1("DisBR ",#400)
	NWss1("DisCflags ")
	NWss1("DisHold ")
	NWss1("NoRef ")
	NWss1("WakeOnCL ",#4)
	NWss1("ReportSE ")
	NWss1("NoWakeups "); return
case dMAPBUF:
	PrinV0("Mapbuf[0:15]",PATTERN); return
case dP34INEC:
	PrinV0("Mapbuf[16:17]",PATTERN rshift 14)
	NWss(" ProcTagInA",#20000)
	NWss(" PrivRefInPair")
	PrinV0(" Pipe34Ad[0:3]",PATTERN<<nib1)
	NWss(" WPinEc1",#200)
	NWss1("MapTroubleInEc1 ")
	NWss1("TagInEc2 ")
	NWss1("CacheRefInEc2 ")
	NWss1("Store_InEc2 ")
	NWss1("IFURefInEc2 ")
	NWss1("MapPEInEc2 ")
	NWss1("MapTroubleInEc2 "); return
case dMCDTSK:
	PrinV0("MDMtagAd[0:3]",PATTERN<<nib0)
	PrinV0(" CurTask[0:3]",PATTERN<<nib1)
	PrinV1("ProcTag",(PATTERN rshift 7) & 1)
	PrinV1(" MDMtag",(PATTERN rshift 6) & 1)
	NWss(" At=Curt",#40)
	NWss(" Dt=Curt")
	PrinV1(" Dtask[0:3]",PATTERN<<nib3); return
case dSTA:
	NWss("VictimInST ",#100000)
	NWss("STIdle ")
	NWss("StartST ")
	NWss("STWait-Mem ")
	PrinV0("STState[0:3]",PATTERN<<nib1)
	NWss(" STfree",#200)
	NWss1("VictimInA ")
	NWss1("MapRfshDly ")
	NWss1("RefUsesDInEc1 ")
	NWss1("AWordRefToD ")
	NWss1("MapWantsPipe ")
	NWss1("MapFree ")
	NWss1("UseAsrn "); return
case dAPESRN:
	PrinV0("ASrn[0:3]",PATTERN<<nib0)
	PrinV0(" ProcSrn[0:3]",PATTERN<<nib1)
	NWss1("MapIs16K ",#200)
	NWss1("MapIs64K ")
	NWss1("MapIs256K ")
	NWss1("RfshAd.0 ")
	PrinV0(" Ec2Srn[0:3]",PATTERN<<nib3); return
case dSTOUT:
	NWss("LoadEn ",#100000)
	NWss("EcLoadEn ")
	NWss("ShiftEn ")
	NWss("EnEcGen ")
	NWss("MapWait-ST ")
	NWss("STPerrNow ")
	NWss("EnableAllMods ")
	NWss1("StartEc1 ")
	NWss1("PairFull ")
	NWss1("Transporta ")
	NWss1("EcFault ")
	NWss1("MemError ")
	NWss1("ChipsAre256/16K ",4)
	NWss1("ChipsAre64K ")
	NWss1("VicSTPerr "); return
case dTAGAT:
	NWss("MemColSela ",#100000)
	NWss("EcHasA ")
	PrinV0("Ptag",(PATTERN rshift 13) & 1)
	NWss(" MapWait-Ec2",#10000)
	PrinV0(" Dtag",(PATTERN rshift 11) & 1)
	NWss(" sHold",#2000)
	NWss(" MapWait-MemState")
	NWss1("MapRfsh ")
	NWss1("AcanHaveD ")
	NWss1("CacheRefInPair ")
	NWss1("EcWordRefToD ")
	NWss1("ChkLastPh6 ")
	PrinV1("Atask[0:3]",PATTERN<<nib3); return
case dMEMST:
	NWss("MapWait-MemD ",#100000)
	NWss("MapWait-MemIO ")
	NWss("MemIdle ")
	NWss("MemFree ")
	PrinV0("MemState[0:3]",PATTERN<<nib1)
	NWss1("FinNext ",#200)
	NWss1("MemRfsh ")
	NWss1("StopFinTaskLoad ")
	NWss1("DdataGood ")
	NWss1("MakeSout_D ")
	PrinV1("MakeTransport[0:2]",PATTERN & 7B); return
default:
	endcase
	]
	PrintWrdByt(nil,lv PATTERN,nil,8); return
]