Heading:
Changes to Dorado Micro Diagnostics
Page Numbers: Yes X: 527 Y: 10.5"
Inter-Office Memorandum
ToDorado MicroDiagnosticDateJune 23, 1981
interest
FromGene McDanielLocationPalo Alto
SubjectRecent Changes to the Dorado’sOrganizationCSL
MicroDiagnostics
XEROX
Filed on: <mcdaniel>DoradoDiagnosticUpdate.memo
Contents:
1. Introduction
2. Preliminaries
3. Overview of Changes
4. Techniques
5. Details about the Changes
1. Introduction
I have finished a round of changes to the Dorado’s diagnostics. The goal of this effort was the following:
8to improve the diagnostics associated with the various RAMs in the Dorado,
8to improve the diagnostics in the area of the map and memory faults,
8to fix the omissions in the diagnostics that have been found and reported to me.
2. A Few Preliminaries
The Dorado diagnostics are kept on [ivy]<Dorado> and <DoradoSource>. There are several new .cm files that various users or browsers will find useful:
<Dorado>getDiagnostics.cm
Use this file to update Dorado Debugging disks. It will retrieve all the .mb and .midas files associated with the Dorado’s microdiagnostics.
<DoradoSource>diagnosticListings>assembleDiagnosticListings.cm
This file will generate a complete, new set of listings from the sources on Ivy. The user of this command file should read it before executing it: the file requires quite a bit of disk storage (use a Dorado) and it requires that the user add an "init-Macro" to bravo’s entries in User.Cm. The "init-Macro" is provided within the .cm file.
<DoradoSource>makeNewDiagnostics.cm
This file will fetch the sources from Ivy and construct an entirely new set of diagnostics from the sources. The user is responsible for obtaining D1Lang.mc, micro.run and microD.run.
3. An Overview of the Changes
The section below named Details provides a list of diagnostic modules and changes that have been made to them this year (I made a few changes in February, and I’m taking this opportunity to describe them here). The most important changes to the diagnostics are sumarized here to help the reader assimulate the detailed information.
PREAMBLE, POSTAMBLE: These files (and all the diagnostics described here) were changed to be compatible with the current realease of D1Lang.mc
A new pseudo-random number generator has been implemented. It should improve the performance of the "random pattern" phase of the storage and cache diagnostics.
KERNEL: Only trivial changes were made to kernel.
MEMA: There are three main changes aimed to improve the diagnostics’ capabilities with storage and cache rams. A "GallPat" test was added to exercise better the cache. There is a new random number generator (mentioned above). The storage address test was improved by causing it to run twice, once using ones as the test pattern, and once using zeros.
To make room in MEMA, various midas-oriented subroutines for storage board debugging have been moved into MemMisc.
MEMMISC: This diagnostic contains the new code that fixes problems with omissions in the diagnostics, that tests the page fault logic, and that tests the FastIO system. First, the FastIO test has been resurrected (it won’t execute unless you invoke the midas-callable subroutine, FioTestOn. This measure was taken since the test will always fail when the FastIO test jig is missing from the machine.
Various subroutines (sPingPong, dirtyWriteLoop, etc) were moved into MemMisc.
The MemPipeAndFaultA diagnostic has been resurrected. This diagnostic causes faults from tasks 2-15 and checks that the various PIPE values are correct. MCR is set so that task 17 does not awaken during the execution of this test.
The new diagnostic MemMapA tests the write protect and referenced bits in the Map. This test also causes faults and awakens task 17 as a normal part of its execution.
The new diagnostic MemProcA checks the MD path in the processor that is associated with the shifter-masker. This path had been unchecked and is used heavily by the bitblt microcode.
IFU: The IFU diagnostics have been split into two different diagnostics (there was too much code for the Dorado’s microstore): IfuSimple and IfuComplex. IfuSimple contains all the old tests that read and write the Ifu’s ram. IfuComplex contains the code that executes IfuJumps. The old microcode file, Ifu3, has been broken into three files: Ifu3a, Ifu3b, Ifu3c.
The file, Ifu3b, contains new diagnostics that fix earlier omissions: RestoreStkP, IDFetch←, Fetch←ID, and use of ID on both Amux and Bmux.
Ifu3c contains new tests in the iRamPE test: Ram parity errors are actually forced on the machine to make sure the the exception logic generates the RamPE exception. The regular test has been fortified.
Note: In the course of this work I discovered a nonfatal design bug in the Ifu: IF there is reschedulePending, and a RamPE and a new, valid opcode drops into the "J" level of the pipe before the processor performs an IFUJump, THEN the IFU forgets the RamPE and provides the reschedule exception instead. This is why the iRamPE diagnostic has never found a ram parity error. I fixed the problem in the software at the cost of being unable to check parity problems with the Pause and Jump bits in the ram.
4. TECHNIQUES
I think that setting MCR.fdMiss (force dirty miss) during the storage diagnostic will help to drive both the cache and storage boards much harder. This can be done by placing a breakpoint at the beginning of the storage diagnostic and setting mcr from Midas.
Herb Yeary tried a suggestion of mine that appears useful when looking for ST parity error problems: A blue wire fix can cause ST parity errors to inhibit loading storage from the cache. This enables the technician to compare the data in the cache with the data in storage. Frequently there will be a one-bit difference and that will indicate the cache chip with the problem. Of course this trick will not always work since the word that gets the ST parity error might be one that was changed by the processor. T. Diebert is investigating a Rev to MemX that would make this change a permanent part of the Dorados that have PC’d MemX boards.
Remember that you can easily patch calls to any of the diagnostic’s subroutines from the patch areas (L2, L3,...L5).
5. DETAILS
MemMisc.mc
restartDiagnostic label added to implement "restart" (vs. begin)
Add call to aMapTest
Add call to aProcShifter
MemAFIO.mc
Finish updating FastIO test code for Model 1.
MemChaosS.mc
MemDefs.mc
rm[BRX] -> rm[cBrX] to eliminate Midas complaints about redefining "BRX"
Move the definition of xPageXLo, xEndPageLo, xPageXHi, xEndPageHi to rbase where they are more appropriate.
Remove old defns associated with memMisc: memPipeAndFaultA
Provide for default initialization of memState (left half of memFlags word)
Remove TaskContinueLoc from MemA stuff
Make FIOtest default false, add aMapTest
Add memState.aProcShift
MemDesperateA.mc
Created this file from some of the old contents of memSubrsS. Microcode includes the Midas oriented tests for special situations: Eg., sPingPong, dirtyWriteLoop, etc
MemMapA.mc
New diagnostic that checks the map "ref bit", checks map "write protect" bit, causes page faults in the emulator, and checks that the data in the various PIPEs is ok.
MemPipeAndFaultA.mc
Update this test for Model1: tries to test all the PIPE positions and bits in the Pipe’s rams. This test uses MCR to keep wakeUps OFF while causing faults.
MemProcA.mc
New diagnostic that checks the Md paths associated with using the shifter. Those paths were heretofore unchecked by the microdiagnostics.
MemRWC.mc
MemRWD.mc
Add GallPat test. GallPat is a special pattern generating test that comes highly recommended by T. Diebert.
MemRWS.mc
Change main data test to use PreFetch to speed it up.
Change the addressing test (sAddrTest) so that the work gets done by a subroutine. The subroutine was parameterized to the addressing test can be made to background with zeros and test with ones or to background with ones and test with zeros.
MemRWX.mc
Fix X-board error that occured when x-Board has been removed from machine and techs have "turned-off" xBoard testing.
MemSubrsA.mc
Compress the code associated with "Add", "Remove", "Only" -BoardTest.
Add subroutine iMemState that initializes the sTestFlags register with the left half of memFlags word from IM. sTestFlags contains a copy of MemFlags that the diagnostics’s control uses to see which memMisc diagnostic to execute.
MemSubrsC.mc
Change references from brx to cBrX to avoid complaints from Midas while loading the microdiagnostic.
Fix setMbase subroutine to use bmux load rather than bdispatch+ff load for setting current MemBase (saves a lot of microcode space).
Accommodate nonzero default values for memSttate (left half of memFlags).
MemSubrsD.mc
Add setCache0, a modification of zeroCache0, to provide greater flexibility when initializing the cache.
MemSubrsS.mc
Miscellaneous fixes to make microcode smaller.
Change nextSPat to cycle the random number seed.
Fix problems in sPingPong (moved to memDesperateA).
Modify iSboard to call iMemState and xGetMapICs.
Move sPingPong, dirtyWriteLoop and doScheckOut to memDesperateA.mc
MemSubrsX.mc
Change map page iterators to handle 64K, 256K ICs, other similar changes.
Miscellaneous changes to make the code smaller.
Postamble.mc
Fix random number generator to use a better algorithm (from E.Taft). Modify Restart code and various subroutines associated with random numbers. Add setRandV, cycleRandV.
Preamble.mc
Adapt to current D1Lang.mc
Fix getRandom to use new random number generator, add miscellaneous rm definitions for new random numbers.
IfuComplex.mc
Create this file -- old "ifu" got too big for IM. This diagnostic runs the "complex" IFU diagnostics; ie., those that execute IfuJumps.
IfuSimple.mc
Create this file -- old "ifu" got too big for IM. This diagnostic restricts itself to reading and writing the IFU ram.
Ifu1.mc
Add code to mask out unwanted bits from get IfuLH in addressing test.
Fix stack handling bug in return code of addressing test; fix old bug in fastStore code that was fetching rather than storing.
Move common code out of this file and into IfuSubrs.mc
Ifu2.mc
Ifu3a.mc
Create this file out of Ifu3 which was getting too big for Bravo.
Add iMiscTests for RestoreStkP, IDFetch←, Fetch←ID
IFU3b.mc
Create this file out of Ifu3 which was getting too big for Bravo.
Contains new tests for RestoreStkP, IDFetch←, Fetch←ID, and for the use of ID on Amux and Bmux.
IFU3c.mc
New ramPE tsets -- found and kludged around an Ifu design bug that causes ramPEs to be forgotten while reschedulePending is true.
IfuChaosSubrs.mc
IfuDefs.mc
Change rm definition for Bmux to BmuxRM to eliminate Midas complaints while loading the microdiagnostics.
Add new instruction, opSign3 which is a 3 byte signed instruction for the miscellaneous tests.
IfuRamSubrs.mc
Add opSign3 instruction.
IfuStepSubrs.mc
Move incClock into IfuSubrs.mc.
Change references from Bmux to BmuxRM to keep midas happy.
IfuSubrs.mc
Create this file out of the common subroutines in Ifu1. This file contains pattern subroutines, instruction dispatch locations, afterDispatch, etc.
IfuTestSubrs.mc
Kernel1.mc
Change "bypass" to accommodate new D1Lang.
Kernel2.mc
Expand TIOA test.
Kernel3.mc
Kernel4.mc
c: McDaniel