MDFields.mesa
Copyright © 1986 by Xerox Corporation. All rights reserved.
Willie-Sue, May 6, 1986 1:18:56 pm PDT
microinstruction field definitions for MicroD, ONLY for Dorado Model 1
MDFields: CEDAR DEFINITIONS =
BEGIN
OneBit: TYPE = [0..1];
Dti: TYPE = MACHINE DEPENDENT RECORD [ -- Dorado target instruction
dti0 (0): DimWord0,
dti1 (1): DimWord1,
dti2 (2): DimWord2
];
Dorado Instruction Memory words
DimWord0: TYPE = MACHINE DEPENDENT RECORD [
rstk (0: 0..3): [0..17B], -- RM address or stack control
aluf (0: 4..7): [0..17B], -- ALU function
bsel (0: 8..10): [0..7], -- BMux selection
lc (0: 11..13): [0..7], -- T← and R← control
asel0thru1 (0: 14..15): [0..3] -- AMux selection
];
DimWord1: TYPE = MACHINE DEPENDENT RECORD [
asel2 (0: 0..0): OneBit,  -- AMux selection
blk (0: 1..1): OneBit, -- BLOCK or stack selection bit
ff (0: 2..9): [0..377B], -- Function, constant, or extension for branch address
jcn (0: 10..15): SELECT OVERLAID * FROM -- Jump control and address
jcnLocal => [jcLocal (0: 10..11): [0..3], jnLocal2thru5(0: 12..15): [0..17B] ],
jcnGlobal => [jcGlobal (0: 10..11): [0..3], jnGlobal2thur5(0: 12..15): [0..17B] ],
jcnLong => [jcLong (0: 10..13): [0..17B], jnLong4thru5(0: 14..15): [0..3B] ],
jcnFast => [
jcFast (0: 10..10): OneBit,
jnFast2thru3 (0: 11..12): [0..3],
jnFast5thru6 (0: 13..14): [0..3],
jcCond0 (0: 15..15): [0..1]
],
ENDCASE
];
DimWord2: TYPE = MACHINE DEPENDENT RECORD [
jcn6thru7 (0: 0..1): [0..3],  -- bottom two bits of Jump control and address
brkP (0: 2..3): [0..3],  -- Breakpoint (bad parity) bits
blank (0: 4..15): [0..7777B] ← 0
];
JCN format values
jcLocalValue: WORD = 2;
jcLongValue: WORD = 0;
jcGlobalValue: WORD = 3;
jcFastValue: WORD = 0;
-- IFUM layout
Tifum: TYPE = MACHINE DEPENDENT RECORD[
tifum0 (0): TifumWord0,
tifum1 (1): TifumWord1
];
TifumWord0: TYPE = MACHINE DEPENDENT RECORD[
pa (0: 0..5): [0..77B],  -- only uses low bit
notIFADr2 (0: 6..15): [0..1777B] -- not (address rshift 2)
];
TifumWord1: TYPE = MACHINE DEPENDENT RECORD[
sgn (0: 0..0): OneBit,
iPar (0: 1..3): [0..7B],
notLength (0: 4..5): [0..3],
notRBaseB (0: 6..6): OneBit,
memB (0: 7..9): [0..7B],
notTPause (0: 10..10): OneBit,
notTJump (0: 11..11): OneBit,
nValue (0: 12..15): [0..17B]
];
END.