%
Page Numbers: Yes First Page: 1
Heading:

kernel5.mcOctober 14, 1986 4:15 PM

%

set[TaskCodeloc, 7000];mc[TaskCodelocC, TaskCodeloc];
set[TaskErrorloc, 6400];mc[TaskErrorlocC, TaskErrorloc];
set[Task17loc, 7400];mc[Task17locC, Task17loc];
set[Tasktestloc, 6000];mc[TasktestlocC, Tasktestloc];
set[JunkTaskloc, 5400];mc[JunkTasklocC, JunkTaskloc];
Toplevel;

beginKernel5:
call[checkTaskNum], t ← R0;
skpif[ALU=0];
branch[AfterKernel5];*Don’t try if not in Task 0
TaskingOff;
T ← R0;
hold&tasksim←t;*This will turn off the Task Simulator (Task12).

Cnt ← RM1;
Kernel5Delay:
Skpif[cnt=0&-1];
Goto[Kernel5Delay];*Try to give Task 12 some time to stop.
set[xtask,0];
InitTPC: *Inititialize all task tpc’s to TaskError code
Rscr2 ← 1c;*Set Rscr2 to 1 for the first task number
Q ← (RM1);*Set Q = 177777, the successful task running will set it back to 0

InitTPCL:
cnt ← 16S;
rscr ← 1C;

InitTPCL1:
TaskingOff;
T ← TaskErrorlocC;*Init TPC,s 1 - 17 to TaskError location.
Link ← T;
ldTPC ← (Rscr);
Rscr ← (Rscr)+1;
Skpif[cnt=0&-1];
Branch[InitTPCL1];

%
TaskSwitch will Notify each task from 1 to 17.
The check for Q=0 would indicate that Q was zeroed by the TaskCode, indicating that the switch happened. I reinitialize all of the TPC’s after each test.
All of the unused TPC’s are set to TaskError this is a place we should never goto.
We should go to TaskError only when something went wrong like Notifying task 7 and we actually went to task 5.
%

TaskSwitch:
T ← TaskCodelocC;*TaskSwitch code is run in Task 0.
Link ← T;
ldTPC ← (Rscr2);*Task number is in Rscr2
Noop;
Noop;
TaskingOn;
T ← (Rscr2);
Call[NotifyTask];
noop;
noop;*We should notify Task in Rscr2 then block back to task 0 "Q"
*should be 0 if the correct task number that was notified.

T ← Q;*This is the first instruction to run after TaskCode blocks
Skpif[Alu=0];
TaskSwitchErr:
Error;
Rscr2 ← (Rscr2)+1;*Increment task number
Q ← (RM1);*Update Q to the current task number
(Rscr2) # (20C);*Stop testing when we try to test task 20
Skpif[Alu=0];
Branch[InitTPCL];*Reinitialize all task tpc’s for next test
noop;
Branch[TaskPreempt];

set[xtask,17];
TaskCode:
T ← 0C, at[TaskCodeloc];*Put a breakpoint here to ovserve each task being Notified
hold&tasksim←t;*This will turn off TestTW just in case it is a problem.
Q ← T;*Put a 0 into Q to prove we went to Taskcode.
Branch[TaskCode], Block;

TaskError:
Noop, at[TaskErrorLoc];*We should never get to here, check Rscr2 for the task
Error;*number we were setting. Check TPC 0 for the last
*microinstruction the EMU ran.

%
TaskPreempt will Notify each task. The TaskTest code will then notify task 17 there by setting each task’s Ready flip/flop using the preempting logic on the ContA board. The Task17 Code will Block back to the TaskTest code where Q will be set to 0.
%
TaskPreempt:
Rscr2 ← 1c;*Set Rscr2 to 1 for the first task number to test.
Q ← (RM1);*Set Q to 177777
InitTPCL2:
Cnt ← 16S;
Rscr ← 1C;
InitTPCL21:
TaskingOff;
T ← TaskErrorlocC;*Init all task tpc’s to TaskError code
Link ← T;
ldTPC ← (Rscr);
Rscr ← (Rscr)+1;
Skpif[cnt=0&-1];
Branch[InitTPCL21];
Preempt:
T ← TaskTestlocC;*Preempt code is run in Task 0.
Link ← T;
ldTPC ← (Rscr2);*Task number is in Rscr2
TaskingOn;
T ← (Rscr2);*NotifyTask in a subroutine in Postamble.mc T=Task number.
Call[NotifyTask];*This will cause the TaskTest code to be run.

T ← Q;*We will return here from TaskTest code blocking.
Skpif[Alu=0];*Q is set to 0 in the Task Test code.
PreemptErr:*The task we were testing is in Rscr2. If Q=0 Testing is ok.
Error;*If Q=17 the task under test did not set it’s Ready FF when it
Rscr2 ← (Rscr2)+1;*was preempted in the TaskTest code.
Q ← (RM1);
(Rscr2) # (17C);*Stop testing when we get to task 17.
Skpif[Alu=0];
Branch[InitTPCL2];*Reinitialize all task tpc’s to TaskError location for the next test.
Goto[Junktasktest];

TaskTest:
TaskingOff, at[TaskTestloc];
T ← Task17locC;
Link ← T;
T ← (17s);
ldTPC ← (T);*Task number is 17. Task17 code will be run.
TaskingOn;*Notify task number 17. This will preempt this task and set
Call[NotifyTask];*It’s Ready FF to indicate it was preempted.

T ← Q;*Task 17 should block back to here with 17 in the Q reg.
(T) # (17C);
Skpif[Alu=0];
TaskTestErr:
Error;*If Q is not = 17 then task 17 code didn’t run.
T ← 0C;
Q ← T;
Branch[TaskTest], Block;
set[xtask,17];
Task17:
T ← 17C, at[Task17loc];*Set Q to a 17 to prove we went to task 17.
Q ← T;*Put a breakpoint here to observe each ready FF being set
Branch[Task17], Block;*as a result of the code at TaskTest preempting its own task.
%
This is a test of the 16us. Pendulum signal coming from the Baseboard to the Ifu board on pin number <176>. The logic is on page 15 of the IFU board. The Pendulum signal is a 16 us square wave.
The JunkTw is tied to Task 2 on the Conta Board and can be scoped at pin number <13> on the IFU board. The signal at pin <13> should be about 32 us. This test is ignored if the IFU board is not installed in the computer.
%
JunkTaskTest:
TaskingOff;
IFUMRH←(R01);*Check to see if IFU board installed.
Rscr←IFUMRH’;
T ← (R10);*IFUMRH comes in inverted.
T # (Rscr);
Skpif[Alu=0];
Goto[Kernel5Exit];*No IFU board installed goto Kernel5Exit.
T ← JunkTasklocC;*Set up Tpc 2 for 5400.
Link ← T;*5400 = JunkTask.
T ← (2s);
ldTPC ← (T);*Junk Task is task number is 2.
Q←(R0);
Cnt ← RM1;
AckJunkTW ← (RM1);
TaskingOn;
JunkTaskSpin:*See if we can wake up the Junk Task for 1 count.
T← (Q);
T ← T # (R0);
Skpif[Alu=0];
Goto[JunkTaskStart];*This code will also syschronize the Counter with the microcode
Skpif[cnt=0&-1];
Goto[JunkTaskSpin];
PendulumDead:*Check pin #<176> on the Baseboard
Error;
JunkTaskStart:
Cnt ← RM1;
JunkTaskL:
Skpif[cnt=0&-1];
Goto[JunkTaskL];*Patch JunktaskL+2 to be LongGo[JunktaskL] to scope board.
TaskingOff;
T ← (0c);
AckJunkTW ← (T);*Just to be sure we turn off JunkTW.
T ← Q;*T and Q will have the count the JunkTask wakeups.
Rscr ← 200c;*Normal count in Q is 404 with clocks set to 31.7ns.
Rscr2 ← T - (Rscr);
SkpUnless[Alu<0];
JunkTaskErrSlow:
Error;*An error here says the counter is too slow!
Rscr ← 1000c;
Rscr2 ← T - (Rscr);
Skpif[Alu<0];
JunkTaskErrFast:
Error;*An error here says the counter is too fast!
Goto[TestTW];
JunkTask:
Noop, at[JunkTaskloc];
T ← (1c);
AckJunkTW ← (T);
T ← Q;*Set Q to +1 to count the times we ran the JunkTask code.
T ← (T)+1;
Q ← T;
Branch[JunkTask], Block;
%
This is a test of the TestTW circuit on page 26 of the ProcH board.
The Counter is loaded with a FF=154 (Hold&TaskSim←B) function.
If this test fails the F-16 at location A03 or A04 is usually at fault.
%

TestTW:
TaskingOff;
T ← TaskCodelocC;*Set up Tpc 12 for 7000.
Link ← T;*7000 = TaskCode.
T ← (12s);
ldTPC ← (T);*TestTW is task number is 12.
TaskingOn;
Q ← (RM1);*Set Q = 177777, the successful task running will set it back to 0
T ← (400C);
hold&tasksim←t;*This will set the A04 chip to the smallest count.
Cnt ← (T);
TestTWL:
Skpif[cnt=0&-1];
Goto[TestTWL];*Wait for a while to let task 12 wake-up and zero the Q register.

T ← Q;
Skpif[Alu=0];*Q is set to 0 in the Task Test code.
TestTWError:
Error;*The TestTW logic on Page 26 of the ProcH board is not working.

Kernel5Exit:
Goto[AfterKernel5];