*----------------------------------------------------------- Title[RegisterDefs.mc...September 11, 1985 4:41 PM...Rumph]; * This file contains all RMRegion assignments for the Alto Emulator and * I/O tasks, and register assignments that are used in multiple source files * or that occupy shared RMRegions. *----------------------------------------------------------- * Note that in many cases, only the RMRegion name is declared here. * Registers within the region are defined within the module in which * they are used: * SetRMRegion[regionName]; * RVN[regName0]; * ... * Macro to define synonyms for RM locations: RME[newName, oldName]; M[RME, RM[#1, IP[#2]]]; *----------------------------------------------------------- * Region 0 -- IFU-addressable RMRegion[RMForIFU]; * Reserved for IFU-based emulators *----------------------------------------------------------- :If[Not[AltoMode]]; ******** PrincOps version ******** RVN[NWW]; * New Wakeups Waiting :EndIf; ********************************** * Other registers defined in DMesaDefs.mc (for Mesa) *----------------------------------------------------------- * Region 1 -- IFU-addressable RMRegion[AEmRegs]; * AltoEmulator Registers Set[rbAemRegs, 1]; *----------------------------------------------------------- RVN[R400]; * Constant 400 -- must be first :If[AltoMode]; ********** Alto version ********** RVN[Cry]; * Carry (must be all zeroes or all ones) RVN[RCode]; * Copy of low 16 bits of IFU base register RVN[NWW]; * New Wakeups Waiting RVN[spAC0]; * StkP value that addresses AC0 RVN[spAC1]; * StkP value that addresses AC1 RVN[spAC2]; * StkP value that addresses AC2 RVN[spAC3]; * StkP value that addresses AC3 RVN[EmuBRHiReg]; * holds hi bits of emulator normal space RVN[EmuXMBRHiReg]; * holds hi bits of emulator alternate space :Else; ******** PrincOps version ******** Reserve[11]; * Reassigned for other purposes (Mesa, Initial) :EndIf; ********************************** RVN[ETemp0]; RME[ETemp, ETemp0]; * Emulator temporaries RVN[ETemp1]; RVN[ETemp2]; RVN[ETemp3]; RVN[ETemp4]; * 16 must be a temporary (for DivSub) RVN[Temp17]; * temp for MulSub and DivSub - must be 17b * Aliases for LoadRam. Note that these must never change, even if the above * registers are shuffled around, since the LoadRam microcode is blown into EPROMs. * Furthermore, it is to the caller's benefit to arrange to overlay LoadRam's * registers with its own temporaries. SetRMRegion[AEmRegs]; Reserve[12]; RVN[LRFlag]; * RM 32: flag word passed to LoadRam RVN[LRTemp0]; * RM 33: temporary RVN[LRTemp1]; * RM 34: RVN[LRItem]; * RM 35: ending address returned by LoadRam RVN[LRTemp2]; * RM 36: *----------------------------------------------------------- * Region 2 RMRegion[BBRegs]; * BitBlt registers * Individual RM locations defined in BitBlt.mc. * This region may be re-used by any other emulator-level microcode requiring * an entire region of temporary storage and no permanent storage. *----------------------------------------------------------- *----------------------------------------------------------- * Region 3 RMRegion[EIRegs]; *----------------------------------------------------------- Reserve[4]; * Ethernet input task registers RVN[FltPipe0]; * Information left by fault task RVN[FltPipe1]; RVN[FltPointers]; RVN[FltErrors]; RVN[FaultVal]; RVN[FaultMapVal]; RVN[FaultInfo]; RVN[FltMemPtr]; RVN[FltTemp]; * one always needs a temp RVN[FltEmuPC]; *----------------------------------------------------------- * Region 4 RMRegion[EORegs]; *----------------------------------------------------------- Reserve[7]; * Ethernet output task registers RVN[AUTPC]; * Request PC for Asynchronous Utility Task RVN[VirtualBanks]; * Size of virtual memory in units of 64K words RVN[RealPages]; * Size of real memory in pages * Remaining registers are used as temps by InitMem.mc (only during initialization). *----------------------------------------------------------- * Region 5 RMRegion[DiskRegs]; * disk registers *----------------------------------------------------------- :If[AltoMode]; ********** Alto version ********** RVN[DefaultPartition]; * Default disk partition RVN[MaxPartition]; * Maximum legal partition :EndIf; ********************************** * Remaining registers are defined in DiskDefs.mc *----------------------------------------------------------- * The following 2 regions are for Alto terminal emulation. * Region 6 RMRegion[TWTRegion]; * Terminal word task registers * Individual RM locations defined in DisplayDefs.mc *----------------------------------------------------------- *----------------------------------------------------------- * Region 7 RMRegion[THTRegion]; * Terminal horizontal task registers * Individual RM locations defined in DisplayDefs.mc *----------------------------------------------------------- *----------------------------------------------------------- * The following 6 regions are for the Raster Device Controller. * Region 10 RMRegion[RastRMForA]; * RDC A-channel registers Set[!AChannelRegion, !RastRMForA]; * RM for DispY's A channel * Individual RM locations defined in RastDefs.mc *----------------------------------------------------------- * RastRMForA must be assigned an RBase value with bits [2..3] as 0. * RastRMForB must equal RastRMForA, but with bits [2..3] as 1. * RastRMForC must equal RastRMForA, but with bits [2..3] as 2. * RastRMForD " " " but with bits [2..3] as 3. *----------------------------------------------------------- * Region 11 RMRegion[RastRMForB]; * RDC B-channel registers Set[!CPARegion, !RastRMForB]; * RM for XFer and Process stats * Individual RM locations defined in RastDefs.mc or CPAStats.mc *----------------------------------------------------------- *----------------------------------------------------------- * Region 12 RMRegion[RastRMForC]; * RDC C-channel registers Set[!BChannelRegion, !RastRMForC]; * RM for DispY's B channel * Individual RM locations defined in RastDefs.mc or DisplayDefs.mc *----------------------------------------------------------- *----------------------------------------------------------- * Region 13 RMRegion[RastRMForD]; * RDC D-channel registers Set[!DHTRegion, !RastRMForD]; * Display horizontal task (DHT) registers * Individual RM locations defined in RastDefs.mc *----------------------------------------------------------- * Region 14 -- Unused region for now RMRegion[FInRegion]; Set[!NSIRegs, !FInRegion]; * RMRegion[NSIRegs] (for 10MB Ethernet) * FInRegion reserved for later use by Raster Device Controller's FIn task * For 10MB Ethernet Input Task; individual RM locations defined in Pilot10MBEther.mc *----------------------------------------------------------- * Region 15 RMRegion[RCRegs]; * Reference Counting opcodes. *----------------------------------------------------------- *----------------------------------------------------------- * Region 16 RMRegion[Events]; * Junk task -- clock and event counters * Registers defined here because lots of people look at RTC430. *----------------------------------------------------------- RVN[RTClock]; * Real-time clock RVN[RTCDeltaLo]; * Constant delta for DDA increment RVN[RTC430]; * Copy of VM 430 :If[AltoMode]; ********** Alto version ********** RVN[RTCFrac]; * Low part of DDA fraction :Else; ******** PrincOps version ******** RVN[WakeupTime]; * RTClock value at which wakeup is to occur :EndIf; ********************************** RVN[EventAHi0]; * Event counter shadow registers RVN[EventAHi1]; RVN[EventALo]; RVN[EventAPrev]; RVN[EventBHi0]; RVN[EventBHi1]; RVN[EventBLo]; RVN[EventBPrev]; RVN[EventUpdateTimer]; RVN[EventTemp0]; * Used only by emulator task RVN[EventTemp1]; * Used only by emulator task RVN[JunkTemp]; * Used only by junk task *----------------------------------------------------------- * Region 17 RMRegion[LTRegion]; * Rast line task region (LTRegion MOD 4 must = 3) Set[!NSORegs, !LTRegion]; * RMRegion[NSORegs] (for 10MB Ethernet) * Individual RM locations defined in RastDefs.mc or Pilot10MBEther.mc *-----------------------------------------------------------