Addr Title  Use

0 L[0]  Local Frame (indexed by MemBX)

1 G[0]  Global Frame (indexed by MemBX)

2 SD  System Dispatch table

3 PDA, RQBR  Base of Process Data Area (also Ready Queue)

4 L[1]  Local Frame (indexed by MemBX)

5 G[1]  Global Frame (indexed by MemBX)

6 ZCTBR  Pointer to ZCT

7 WPBR  Cached version of ZCT.wp

10 L[2]  Local Frame (indexed by MemBX)

11 G[2]  Global Frame (indexed by MemBX)

12 BBDstBR  BitBlt Destination Base Register

13 BBSrcBR  BitBlt Source Base Register

14 L[3]  Local Frame (indexed by MemBX)

15 G[3]  Global Frame (indexed by MemBX)

16 ScratchBR  Emulator General Purpose Scratch (also RQBR)

17 PCHistBR  Base of Histogram for PC Sampling

20 RastBRForA, AChannelBR For both DispY and Monterey

21 TChannelBR  DispM BR for AWT

22 RastBRForB, BRForCPA Monterey B channel, xfer & process stats

23 LTBR  BR for Rast Line Task

24 RastBRForC, BChannelBR C channel for Monterey, B channel for DispY

25 MapBitsBR  VM "Vacant" Extra-Bit Array (in DMesaMiscOps.mc)

26 RastBRForD, NSIBR C channel for Monterey, 10MB Ethernet input

27 FInBR, NSOBR Reserved for Monterey Fin, 10MB Ethernet output

30 DiskBR  Disk Task Base Register

31 IOBR  IO Region (first 64K) Base Register

32 EIBR  Ethernet Input Base Register

33 EOBR  Ethernet Output Base Register

34 LPtr, MLBR  Long Pointer, Monitor Lock Base Register

35 BR35, CVBR Condition Variable Base Register

36 MDS  Alto and Mesa MDS Base Register

37 Code  IFU Code BR