*start*
00226 00024 US
Date: 1 JAN 1979 1459-PST
From: DEUTSCH
Subject: Release of MicroD 7.10
To: Micro-Micro(D) Users:
Fixes an oversight which caused some Dorado Model 1 programs not to place.
No other changes.
------
*start*
00531 00024 US
Date: 2 JAN 1979 0853-PST
From: MCDANIEL
Subject: new mema on dorado debugging disk
To: Dorado Core Group:
There's a new mema on the dorado debugging disk. Mostly there are
organizational changes. There are two new procedures,
sNoErrsOn set memState.noErrs
sNoErrsOff clear memstate.noErrs
that control whether the storage data test (& no other tests) will ignore
errors. When sNoErrs is true, the storage data test skips over the error check.
There are new listings in the Dorado lab.
Gene
-------
*start*
00410 00024 US
Date: 8 JAN 1979 1820-PST
From: STROLLO
Subject: Smalltalk Calendar Demo
To: Dorado Core Group:
People,
I have been asked by SDD to give them a demo of Smalltalk Calendar
which I'd sure like to do on the model 0 Dorado in the Polos Room. It
would be Monday January 15 lasting about 1 hour starting 11AM. Does
anyone have an objection? I'll copy Ira on this note too.
Ted
-------
*start*
00225 00024 US
Date: 9 JAN 1979 1149-PST
From: MCDANIEL
Subject: new kernel on model1 debugging disk
To: Dorado Core Group:
This kernel exercises the reschedule, reschedule' fast branch conditions.
Gene
-------
*start*
01582 00024 US
Date: 13 JAN 1979 1359-PST
From: MCDANIEL
Subject: new mema.dm on [ivy]<dorado>
To: Dorado Core Group:
Contrary to comments in the log, the most current version is now on
[ivy]dorado. Butler, the 32 bit cycled va is in, not checked out. It only
iterats 24 times -- that can be patched. I'll fix it when I return.
The sFlushTest leaves useMcrV set (the r - register sMCRvictim
is left w/ a value IN [0..3]. This is a bug. 10B is the bit in memFlags
that turns off the flush test; however, once it has run, sMCRvictim is
set. After turning off sFlushTest, manually setting sMCRvictim to 7 will
fix this problem.
MicroD problems forced me to remove sDirtyWriteLoop and sPingPong.k
There are comments in the code for chaos test that describe how to control
which rows get addressed (set sChaosRow0, sChaosRow1 -- these are row values,
not virtual addresses).
The storage diagnostic runs in module 3 only.
There are comments in the code that describe how to gain more control
over conditional tasking during the storage write loop of the sdTest, how
to gain greater control over the effects of sNoErrsOn, and how to remove
the store← instruction from the memory task simulator code (memSubrsA).
A note on running w/o module 0: I believe any contiguous configuration of
storage modules will be acceptable to the diagnostic. Holes in the configuration
are not acceptable (ie., M1, M3 won't work).
iSboard sets procSRN to zero (used to be necessary to say "begin;g". Now you
can begin at the beginning of the sboard test, or call iSboard.
Gene
-------
*start*
00315 00024 US
Date: 15 Jan 1979 11:02 am (Monday)
From: Suzuki
Subject: Mesa emulator
To: D1users↑
Anyone interested in debugging IFU microcode? Mesa emulator for model1 has
been written and on directory [IVY]<D1SOURCE>MESA>BMESA.DM. You are
welcome to retrieve and find bugs and report to me.
Nori
*start*
00320 00024 US
Date: 15 JAN 1979 1629-PST
From: DEUTSCH
Subject: MicroD 7.11
To: Micro-Micro(D) Users:
This release has some more changes in the placement algorithm, mostly affecting
the Dorado model 1, and some more statistics on what the placer is doing,
which you may ignore. No external changes.
------
*start*
00545 00024 US
Date: 19 Jan 1979 5:53 pm (Friday)
From: Pier
Subject: Dorado task assignments
To: DoradoCore↑
Here are the task assignments agreed upon at the Friday meeting:
Task (octal) Task (decimal) Use
17 15 FAULT
16 14 IDIS
15 13 -
14 12 DISK
13 11 -
12 10 Task Simulator
11 09 -
10 08 -
07 07 ETHER
06 06 ETHER
05 05 -
04 04 -
03 03 -
02 02 JUNK
01 01 Microcode restart
00 00 EMU
Task simulator may vary. Dorado display controller (DDC) will run in 11D or
13D, as needed.
Ken
*start*
00262 00024 US
Date: 19 JAN 1979 2107-PST
From: BOGGS
Subject: Ethernet
To: Dorado Core Group:
After replacing a bad singapore 176, it just worked. Also had
trouble with the E-side connector making a bad contactwith Block.
/Ed and David
-------
*start*
00693 00024 US
Date: 25 JAN 1979 1325-PST
From: DEUTSCH
Subject: Release of MicroD 7.12
To: Micro-Micro(D) Users:
In this version, you can define additional memories in your Micro file, and any
data, symbols, or forward references (but not cross-file or external references)
for those memories will be passed through unchanged in the .MB file. This is
intended for people who need to preload information into the main memory as part
of their microprogram.
Note that for this feature to be useful, Midas will have to be changed.
This change has not yet been made.
If you didn't understand the foregoing, don't worry about it -- no existing
microprograms will be affected.
------
*start*
00224 00024 US
Date: 27 JAN 1979 1134-PST
From: DEUTSCH
Subject: MicroD 7.13
To: Micro-Micro(D) Users:
This new version properly inverts the IFAD field of the Dorado model 1
IFU memory. No other changes.
------
*start*
00904 00024 US
Date: 29 Jan 1979 3:50 pm (Monday)
From: clark
Subject: WP problem
To: DoradoCore↑
Consider: an entry in the cache has WP set.
The program clears the corresponding WP bit in the MAP.
The program does a store← to that entry.
What happens?
Answer: The cache WP forces the Store← to miss, and the munch is loaded from
storage. But because the MAP's WP is not set, there is no mapfault, no
MapTroubleInEc1, and no setting the VACANT bit for the new munch, which is
what usually happens. Hence we get two entries in the cache for a single
address, one with WP set (the original) and one with DIRTY set (the new one).
This gets us in hot water in short order.
The manual claims you don't need to Flush before clearing the Map's WP on
page 43 (Model 0) and page 45 (Number One), but this ain't so. The munch
should be flushed or otherwise get vacant or have its WP cleared.
Doug
*start*
00607 00024 US
Date: 12 FEB 1979 1802-PST
From: ORNSTEIN
Subject: Smile Guys
To: Dorado Core Group:
Date: 10 FEB 1979 2243-PST
From: SHOCH
Subject: a plug from a satisfied customer
To: ornstein
Severo,
I took the opportunity this weeked to try out Smalltalk
on the Dorado (model 0), with a little help from Trygve.
Spentover 6 hours re-working much of the Smalltalk/Ethernet
code, and getting started on the stuff needed for our
Smalltalk-to-Juniper experiments; not a single problem, and
the performance is delightful.
My compliments to the whole Dorado crew.....
john
-------
-------
*start*
00612 00024 US
Date: 15 FEB 1979 1124-PST
From: FIALA
Subject: [Maxc1]<d1docs>d1man-mod1-a.press d1man-mod1-b.press
To: Dorado Users Group:
The new hardware manual is released describing the current status
of the model1, serial number 2 hardware. Major changes are as follows:
1. Memory and IFU figure changes.
2. Updates to the IFU section.
3. Updates to the Error Handling chapter.
4. Updates to the Control Section chapter.
5. Updates to the memory timing, hold, and error handling sections of
the Memory System chapter.
A printout of the new manual release is in the Dorado room.
-------
*start*
00236 00024 US
Date: 20 FEB 1979 1850-PST
From: DEUTSCH
Subject: MicroD and OS 16
To: Micro-Micro(D) Users:
MicroD does not run under OS 16 -- it gives a "Scratch zone full" fatal error.
I will investigate this ASAP.
------
*start*
00295 00024 US
Date: 22 FEB 1979 1002-PST
From: DEUTSCH
Subject: New release of Micro and MicroD
To: Micro-Micro(D) Users:
These releases (MicroD 8.0 and Micro of 2-21-79) are compatible with the new
Alto OS 16; they will also run under OS 15. Let me know if problems arise.
------
*start*
00301 00024 US
Date: 22 MAR 1979 1712-PST
From: DEUTSCH
Subject: New MicroD
To: Micro-Micro(D) Users:
MicroD 8.1, just released, has about 1300 words more internal storage space
and no other changes.
Iris is down, so the only place to obtain the new release is from Maxc1 <Alto>.
-------
*start*
00657 00024 US
Date: 23 MAR 1979 0838-PST
From: SUZUKI
Subject: Dorado timing
To: Dorado Users Group:
I tested timing of Dorado model1 mesa using Rich Johnsson's
internal sorting program.
Alto D1
10000 int sort 21.17 1.87
5000 str sort 49.95 9.20
Integer sort uses a lot of load and store and string store uses a lot
of xfers. As you notice for int sort speed difference is 12 times (Ed's guess is
right)
and for string sort it's about 5 (Gene's guess is right). We expect this
number to increase at least 50 per cent because of 25 ns cycle time (compared
with 35 now) and better architecture of Mesa for D* machines.
Nori
-------
*start*
00340 00024 US
Date: 23 MAR 1979 1707-PST
From: SUZUKI
Subject: New Dorado Mesa Timing
To: Dorado Users Group:
I have an improved version of Mesa microcode which improved in performance of
XFER markedly. Now the comparison with Alto is
Alto D1
10000 int sort 21.17 1.79
5000 str sort 49.95 8.65 (6 times)
Nori
-------
*start*
01619 00024 US
Date: 25 Mar 1979 12:46 pm (Sunday)
From: Taft
Subject: Dorado BitBlt performance
To: D1Users↑
I have written a program that measures the performance of BitBlt in various
cases and under various conditions. I am still analyzing the results, but here are
some highlights.
Transferring a 608 by 736 block of bit map from a source to a destination, with
nothing funny going on, and with the display off:
Alto-I: 171 ms
Dorado model 0: 21.0 ms (a factor of 8.1 times faster than Alto)
Dorado model 1: 13.1 ms (13 x Alto)
This is with the Dorado model 0 running at 35 ns and the model 1 at 28 ns; also,
the model 1 microcode uses the PreFetch← feature to reduce cache misses whereas
the model 0 does not.
Another way of putting this is that on the Alto, BitBlt moves bits at 2.6
megabits/second; on the Dorado model 1, 34 megabits/second.
With the display on, the results of the comparison are more impressive, though
somewhat less meaningful:
Alto-I: 395 ms
Dorado model 0: 26.8 ms (14.7 x Alto)
Dorado model 1: 14.7 ms (26.9 x Alto)
Of course, this is because the display degrades the Alto's performance
significantly more than the Dorado's.
The most complex case of BitBlt is the one in which the result bits are a function
of the source block, the gray block, and the destination block. With the display
on, the timings are:
Alto-I: 591 ms
Dorado model 0: 31.4 ms (18.8 x Alto)
Dorado model 1: 18.5 ms (31.9 x Alto)
One surprising thing I have found is that the use of the PreFetch← feature
yields only about a 10% improvement. I have not yet determined why this is
the case.
Ed
*start*
00674 00024 US
Date: 26 MAR 1979 1358-PST
From: MCDANIEL
Subject: overflow fast branch on model 1
To: Dorado Core Group:
Nori reported a bug associated w/ overflow on model 1. Roger and I found
the fast branch condition is inverted from the one described in the manual.
I modified d1lang to accommodate the hardware; kernel, including the new
overflow test, now runs.
Modify your d1lang appropriately or get a new version from Ed after he
releases one. Since Nori was the first to use this feature, it
is unlikely anyone else is affected other than him.
Nori: I edited d1lang on the mesa disk & performed "@assembleDefsForBmesa.cm@".
Gene & Roger
-------
*start*
01990 00024 US
Date: 23 APR 1979 1559-PST
From: DEUTSCH
Subject: MicroD 8.5
To: Micro-Micro(D) Users:
Please read the following message carefully: some things have changed.
MicroD 8.5 is now available on [Maxc]<Alto>. It is a few seconds faster than
the previous release (8.2) and also has about 2K words more space. No one should
come even close to filling it up. *** Non-SDD users may stop reading here. ***
MicroD 8.5 includes three new global switches which replace the CSMap program.
Let xxx.DLS and xxx.MB be the normal output file names. Then:
/R produces a file xxx.regs containing only the names and initial
contents of the R memory (identical to the listing at the
end of the .DLS file).
/M produces a file xxx.csmap showing the size of each .DIB file and
also how much of each page is occupied by instructions from
which file.
/O produces a file xxxOccupied.mc containing IMRESERVE statements,
which can be assembled with Micro to lock out all (absolute)
locations used by this program.
In order to assemble the xxxOccupied.mc file, you must have a file called
OccupiedDefs.mc on your disk. This file currently resides on [Maxc]<Alto>,
but it will be moved to Iris at the appropriate time.
A new release policy is being followed for Micro and MicroD. Rather than
appearing on [Maxc]<Alto> and [Iris]<WD0> simultaneously, new versions will
be placed only on Maxc, and only transferred to Iris after additional checking
by a responsible party in SDD. For the moment, I will continue to include
SDD users in my release messages, but this may change in the future. SDD users
should clearly understand that the release of these programs on Maxc does
not guarantee that their output has been checked against D0 Midas or any
other SDD software that deals with microcode. (It should be noted that, with
the exception of CSMap which relied on the stability of an undocumented and
unsupported interface, no troubles have arisen in the past.)
-------
*start*
00382 00024 US
Date: 27 APR 1979 1124-PST
From: MCDANIEL
Subject: new d1lang-model1.mc on [maxc]<d1source>d1lang-model1.mc
To: Dorado Users Group:
There is a new version of d1lang-model1 on maxc. This version contains
macros that define constants for the contents of alufm (AFMi, 0<=i<=17), and
there is a fix to the definition of the OVERFLOW fast branch
Gene
-------
*start*
00265 00024 US
Date: 2 MAY 1979 1451-PDT
From: FIALA
Subject: [Maxc1]<D1source>D1lang-model1.mc
To: Dorado Users Group:
I have released a new D1lang that fixes a bug in T←ID, T←SC,
raddr←ID, and raddr←SC. Please report any problems with this.
-------
*start*
00684 00024 US
Date: 7 MAY 1979 1833-PDT
From: FIALA
Subject: [Maxc1]<D1Docs>d1midas-model1.press
To: Dorado Users Group:
I have just made major additions and updates to the Midas manual and
am placing a new copy of the manual in the laboratory. I recommend
a rereading of the sections on "Testing Directly From Midas",
"STKX Kludge", "Memory System Registers and Memories", "Baseboard
Microcomputer Stuff", "Config", "Reset", and "When Registers Are
Read/Written--Restrictions on Continuing" which are either new or
greatly revised from previous versions of the manual. Also of
"Registers and Memories Associated With the DMux" and "DMux Consistency
Checker".
-------
*start*
00465 00024 US
Date: 7 JUN 1979 1658-PDT
From: MCDANIEL
Subject: new mema on [ivy]<dorado>mema.dm
To: Dorado Core Group:
Fixes a bug in the configuration code that caused mema to think
that the 16K modules were really 4K modules. Net effect is that all
the memory of a module gets tested, and consequently the test takes much longer
to complete on iteration.
ONLY the debugging disk on the Dorado with the new display has been updated.
Gene
-------
*start*
00668 00024 US
Date: 8 JUN 1979 1627-PDT
From: DEUTSCH
Subject: Release of MicroD 8.7
To: Micro-Micro(D) Users:
This release incorporates a new global switch /S, which produces a numeric-
order listing of symbols in memories other than IM and RM (e.g. BR, DEVICE,
TASKN). If /N and /S are used together, you DO get a listing of RM symbols.
No other changes are intended. Please report problems to me.
In accordance with the SDD release policy, MicroD release announcements
coming from me only announce the availability of the new release on
[Maxc1]<Alto>: a separate announcement from within SDD will cover updating
of the version(s) on Iris.
-------
*start*
01936 00024 US
Date: 13 JUN 1979 0300-PDT
From: FIALA
Subject: [Ivy]<DoradoDrawings>
To: Dorado Core Group:
Tonight I attempted to get current printouts of all the Dorado Drawings.
When I succeed in doing this I am going to get two-sided copies of
everything made for myself and anyone of you who also wants copies of
the drawings.
However, I noticed the following problems with the drawings:
1) Apparently obsolete:
BaseBd-Rev-Aj (latest date 3/5/79)
Backpanel (latest date 2/28/79)
MemX (latest date 3/16/79)
MSA (latest date 4/20/79)
Display Con. (latest date 4/20/79)
If any of these are in fact current, please let me know; if they are
obsolete, please tell me where to obtain current versions.
2) Inconsistent naming:
The drawings on MemC-Rev-Bc.press are all labeled rev Bc.
3) Missing files:
MemC-Rev-Bc.press is accompanied by MemC-Rev-Ba.ps
There is no .ps file for DispY.
In addition, I have noticed the following style inconsistencies among
the drawings which we should probably rectify at some point:
a) Cover pages should be standardized as to fonts, whether or not the
board title is enclosed in a box, and the general placement of the
stuff on the page.
b) The layout pages used seem to have an assortment of features and
conventions to aid the reader:
ContA and ContB have indices to where a part is used;
ProcH and ProcL have scratch marks indicating free gates in each part;
The IFU has the layout spread over four pages and names the output
signals of each part;
etc.
c) Most of the boards have the drawings arranged with the clocks at the
end; ContA and ContB are exceptions, and it might be worthwhile rearranging
these to conform with the other boards (because of the part page indices
on the layout pages, it may be difficult to rearrange these drawings, but
probably worthwhile).
Correction above: The drawings on MemC-Rev-Bc.press are all labeled rev Ca.
-------
*start*
00303 00024 US
Date: 13 JUN 1979 1450-PDT
From: DEUTSCH
Subject: MicroD 8.8
To: Micro-Micro(D) Users:
This release (on [Maxc]<Alto>) allows storing 0's as well as 1's into IMLOCK,
thereby making an un-IMRESERVE possible. (This feature was requested by
Tom Chang.) No other changes.
------
*start*
00237 00024 US
Date: 18 JUN 1979 1358-PDT
From: FIALA
Subject: [Maxc1]<D1source>D1lang-model1.mc;20
To: Dorado Users Group:
is released. This release fixes a bug in DONTKNOWRBASE and a bug in
IFUJMP reported by LPD.
-------
*start*
00917 00024 US
Date: 26 JUN 1979 0002-PDT
From: MCDANIEL
Subject: new mema on [ivy]<dorado>mema.dm
To: Dorado Core Group:
This version fixes the problems I know about in doScheckOut (MemA's
version of FTest). There is an additional test that makes sure MD is valid
after a store, and the chaos test has been enhanced. The file memRWs, which
contains the main storage tests, is reorganized:
Each test in that file is now a subroutine.
The code at the beginning of the file calls each subroutine in sequence.
There are new listings.
I updated the debugging disk on the alto associated with chassis 3.
Gene
ps. I reenabled the hold simulator on the backpannel of chassis 3. This means
that the chaos test works, again. (Removing the jumper that enables the
task simulator will cause the chaos test to infinitely wait for task 12
to complete.) MemA runs multiple iterations without error.
g.
-------
*start*
00311 00024 US
Date: 28 JUN 1979 1045-PDT
From: MCDANIEL
Subject: new [ivy]<dorado>mema.dm
To: Dorado Core Group:
There's a new mema on [ivy]<dorado>mema.dm. I updated the debugging
disk on the alto associated with chassis 3.
This mema checks reading Dbuf, and performs longfetches.
Gene
-------
*start*
00289 00024 US
Date: 28 JUN 1979 1212-PDT
From: DEUTSCH
Subject: Release of MicroD 8.10
To: Micro-Micro(D) Users:
Fixes a bug affecting Dorado Model 1 only, which prevented forward or cross-file
IFU entry statements from working. Release is on [Maxc1]<Alto> as usual.
-------
*start*
01759 00024 US
Date: 28 Jun 1979 2:28 pm (Thursday)
From: Pier
Subject: As if we didn't have enough headaches ...
To: DoradoCore↑
cc: Gifford, Goldstein, Deutsch, Suzuki, Maleson, HThompson
Confusion and consternation have reared their ugly heads regarding disc packs.
Severo and I offer the following procedural solution. Please follow it unless
otherwise messaged:
1. Packs are currently labeled on their covers. This is nonsense. Labels on covers
are hereby null and void.
2. Packs should be labelled in pencil on their plastic inner rings. DO NOT PUT A
STICKY LABEL ON A PACK. These labels will detach and fly into the heads.
3. Packs that are used in common will be labeled with numbers. The number and
type of Alto "virtual discs" on numbered packs may change, and will be
maintained separately on a list posted in the Dorado lab for now.
4. The current situation is: there are two common packs, labelled #1 and #2.
They each have a Smalltalk disc system, a "Mesa" disc system, and a Lisp disc
system on them. People bouncing back and forth between the two machines
should expect to FTP files back and forth as needed, rather than swapping packs.
Swapping will create more needless confusion and consternation among pack
shareres. Be a good citizen.
5. Dave Gifford has a private pack and a private Midas Model 31 pack. Dave and
other private pack users should save and restore the state of both Trident and
Midas/Alto disc packs when they finish using the Dorados.
6. There are currently two Midas/Alto packs insatlled in the umbilical Altos.
Please leave them where they are. They are labeled UnBug#1 and UnBug#2.
Thank You.
P.S. Problems to Ken or Severo.
P.P.S. Please forward this message to any relavent party I forgot to send it to.
*start*
00394 00024 US
Date: 28 JUN 1979 1530-PDT
From: MCDANIEL
Subject: new ifu diagnostic on [ivy]<dorado>ifu.dm
To: Dorado Core Group:
[ivy]<dorado>ifu.dm contains a new ifu diagnostic whose virtue is
that the storage boards can occupy "M3" positon. This leaves the
memD board uncovered for scoping.
I updated ifu.mb on the altos associated with both chassis 3 and 2.
Gene
-------
*start*
00637 00024 US
Date: 2 JUL 1979 1152-PDT
From: MCDANIEL
Subject: new [ivy]<dorado>mema.dm
To: Dorado Core Group:
There's a new mema on <dorado> AND on both chassis2 and chassis 3 altos.
I believe (hope?) this fixes the last problem in sDoCheckout. The bug
in xVacateCacheRow has been fixed. sDoCheckout contains code that
perfomrs TIOA←-1; TIOA←0 -- this provides a trigger signal on the backpannel.
It occurs at the top of both the read and the store loop.
The fix to xVacateCacheRow should cause the chaos test to be more
effective.
There's new listings, including a table of contents for memSubrsC.mc.
Gene
-------
*start*
00510 00024 US
Date: 3 JUL 1979 0316-PDT
From: MCDANIEL
Subject: yet another, new [ivy]<dorado>ifu.dm
To: Dorado Core Group:
This version includes the ifuChaos test (generate, execute and test
randomly constructed opcodes), iRamPeTest and iReschedTest as a normal
part of the diagnostic sequence. Ie., these tests used to be
called from midas only and now they are a regular part of the diagnostic.
There are new listings, and the Alto associated with chassis 3 has been updated.
Gene
-------
*start*
00835 00024 US
Date: 3 JUL 1979 1225-PDT
From: ORNSTEIN
Subject: IC Inventory
To: Dorado Core Group:
We have to figure out where we stand on IC inventory. Before Mike can really
do that he needs to know what the IC headcount is for each board. He tells me
that at least some of the boards are either in flux or there are plans to use
different IC's than those shown in the LC for the board, etc. etc. I want to
try to understand this at Friday's meeting - in preparation for a Monday meeting
that Roger and Mike and I have with Terry Haney. Therefore if you will
not be at Friday's meeting, please send me a msg. saying either;
a. just trust the latest loading chart for my board
or b.trust it with the following minor exceptions
or c. my board is complicated I'll see you about it
Thanks for your help.
Severo
-------
*start*
00432 00024 US
Date: 3 JUL 1979 2237-PDT
From: DEUTSCH
Subject: Release of MicroD 8.11
To: Micro-Micro(D) Users:
For Dorado users: in full listing mode (i.e. no global /N or /C), produces an
expanded listing of IFUM.
For D0 users: fixes a glitch introduced in release 8.9 which caused "pages"
with addresses up to 37400 to appear in the "words used/free" listing.
The release is only on [Maxc]<Alto> as usual.
------
*start*
00600 00024 US
Date: 6 Jul 1979 11:10 am (Friday)
From: Ornstein
Subject: Junk Elimination from the IFU
To: DoradoCore↑
cc:
In exorcising the Junk on the IFU I want to reduce it to simple 16 bit input and
16 bit output paths. (Presently to read Junk in you have to pre-select - it's a
mess). To accomplish this I want to use four of the IFU's BMux inputs which are
presently used for reading other IFU state - to wit:
WantIfuRef'
EnableFG'
GDv
PcFG15
Who among you cares if I replace these with 4 bits of what will be GenIn
(General Input - symmetric to the present GenOut)?
Severo
*start*
00532 00024 US
Date: 9 Jul 1979 6:56 pm (Monday)
From: pier
Subject: MultiWire - There is Hope
To: DoradoCore↑
This message comes from the "right" hand Dorado with the MultiWire ProcH
board plugged in and running Laurel at 26 nsec !!!!
Crap out at 25 has the same symptom as Lisp crap out had before MultiWire:
garbaged real addresses.
Mema runs at 25. Kernel runs at 23.
Previous timing announcements re: MW board were made with respect to the left
hand machine, which is flakey with a SW ProcH board.
Roger and Ken
*start*
00789 00024 US
Date: 10 JUL 1979 1816-PDT
From: MCDANIEL
Subject: new, interdependent midas, diagnostics
To: Dorado Core Group:
There's a new version of midas, [ivy]<dorado>d1midasrun-m2.dm (you must
"load" it from ftp), and a new version of all the diagnostics.
(on [ivy]<dorado>,
mema.dm
memmisc.dm
kernel.dm
ifu.dm.)
This is an interdependent release! The dependency relates
to the use of command files. Those of you who have your own command files
should note that the following list provides the correct spelling for the
midas commands that are now different:
RunProg
RdCmds
Brk
Ld
Cmpr
Abs
Charlie, note that none of the disks are updated. Before you
load [ivy]<dorado>d1midasrun-m2.dm you should retrieve [ivy]<dorado>midas.programs.
Gene & Ed
-------
*start*
00471 00024 US
Date: 14 JUL 1979 1717-PDT
From: MCDANIEL
Subject: new [ivy]<dorado>kernel.dm
To: Dorado Core Group:
Ken reproted that I'd introduced a bug in the latest release of
the diagnostics. It caused kernel to report, incorrectly, that there was
a problem with "stack+1 ←t". The bug is fixed, there is a new version of
kernel on the altos forassis 2 and chassis 3, [ivy]<dorado>kernel.dm is new, the
listings have the change indicated.
Gene
-------
*start*
00630 00024 US
Date: 17 JUL 1979 1416-PDT
From: MCDANIEL
Subject: making new, double-44 disks on the dorado
To: Dorado Core Group:
There are some problems associated with standard software (like mesa, ftp when
booted from the ethernet & others yet unknown) that crop up when you initialize
a double 44 disk on the dorado. So when you do such a thing,
1. "delete diskdescriptor" when the install finishes, then
2. Boot the scavenger over the ethernet & run it, then
fetch whatever files you may have been interested in.
This sequence appears to work and rewards you with many, many free disk
pages.
Gene
-------
*start*
00383 00024 US
Date: 19 JUL 1979 1410-PDT
From: MCDANIEL
Subject: new [ivy]<dorado>TriconD.mb
To: Dorado Core Group:
There is a new version of the Trident disk microdiagnostic. It fixes the
crash-in-postamble problem with the old version. The Alto associated with
chassis 3 has the new diagnostic. Report problems to Gene --i'm taking
it over from Roger.
Gene
-------
*start*
00740 00024 US
Date: 23 JUL 1979 1129-PDT
From: BATES
Subject: Build Standards
To: Dorado Core Group:
Introduction
Here is another release of the Dorado Build standards.
To update simply load files from [IVY]<DoradoLogic>DoradoFiles.dm
There are esentially 3 changes:
1) Ftp.run is replaced with CallFtp.run, which saves 170 disk pages.
If you are not starting with a blank pack, retrieve
[MAXC]<Alto>CallFtp.run, delete Ftp.run, and rename CallFtp.run to Ftp.run.
2) Changed some of the command files
3) Added more custom macros and dictionary entries.
You should print a new copy of [IVY]<DoradoLogic>BuildStandards.press
(Try the new direct printing from IVY)
Hope this all works!
Roger
-------
*start*
00272 00024 US
Date: 23 JUL 1979 1419-PDT
From: DEUTSCH
Subject: Release of MicroD 8.12
To: Micro-Micro(D) Users:
Fixes a bug only affecting Dorado microprograms in which more than one .DIB
file had non-forward-referring IFU entries. No other changes.
------
*start*
01601 00024 US
Date: 30 JUL 1979 2059-PDT
From: FIALA
Subject: ProcH/L, ContA/B, DskEth multiwire
To: Dorado Core Group:
I have carefully followed RB's procedure for verifying that the
add/delete lists for [Ivy]<DoradoLogic>ProcH-Rev-Ce.dm!1,
ProcL-Rev-Cg.dm!1, DskEth-Rev-Cd.dm!1, ContA-Rev-Cd.dm!1,
and ContB-Rev-Cd.dm!1 are empty and that no errors occurred
during the rebuild.
This was done by doing a rebuild on the stitchweld wirelist for
each board using the SwRebuild.cm command file which Roger
prepared. In theory, this means that the corresponding
MWREV dump files on [Maxc1]<D1Logic> should also be ok.
I did not repeat the multiwire build which produced the MWREV
files on Maxc1. The purpose of the exercise which I went through
was to verify that some time in the future, a designer could
obtain the same sources which I obtained, make changes, and
expect to successfully carry out a rebuild or generate a new
board.
In theory, Mike Overton (with me watching interestedly) should
be able to obtain the appropriate multiwire files from the Maxc1
MWREV dump files and carry out whatever other activities are
required to get these five boards built.
There were several small omissions in RB's "Build Standards" memo
which I will repair later. There were several errors reported for
the DskEth board which RB and DB indicated were unimportant.
If any knowledgable person feels that the verification steps I
carried out were not the most appropriate ones to follow or
that what I did should be supplemented by other checks, please
let me know as soon as possible.
-------
*start*
00644 00024 US
Date: 1 Aug 1979 9:58 am (Wednesday)
From: Clark
Subject: MemD standard versions released
To: fiala
cc: doradocore↑
All four versions of the MemD board have been run through the standard DA
system with no problems. They are:
1K chip version (what we have now)
MemD-Rev-Bd stitchweld version identical to Rev Bc
MemD-mwRev-Bd multiwire version of same
4K chip version (for when the chips exist)
MemD-Rev-Ca stitchweld version
MemD-mwRev-Ca multiwire version
I have hardcopies of all documentation for the Stitchweld version of these boards.
The appropriate dump files are all on [ivy]<doradologic>
Doug
*start*
00356 00024 US
Date: 1 AUG 1979 1556-PDT
From: FIALA
Subject: Documentation Change
To: Dorado Users Group:
I have moved all of the Press files on [Maxc1]<D1Docs> to [Ivy]<DoradoDocs>.
I would like to encourage everyone to use this new directory for Dorado
documentation.
Also, a new release of the Midas manual is on D1Midas.Press;9.
-------
*start*
00342 00024 US
Date: 1 AUG 1979 1856-PDT
From: MCDANIEL
Subject: new [ivy]<dorado>ifu.dm
To: Dorado Core Group:
There is a new ifu diagnostic on Ivy. It has a new test that checks
the execution of opcodes from BrkIns. The diagnostic runs.
Charlie: note that the Debugging disk for Chassis 3 has NOT
been updated.
Gene
-------
*start*
00580 00024 US
Date: 8 Aug 1979 9:59 pm (Wednesday)
From: Pier
Subject: Nine Point Four Times....
To: DoradoCore↑
cc: Kolling
------------------------------------------------------------
Date: 8 Aug 1979 6:34 pm (Wednesday)
From: Kolling
Subject: nine times.....
To: Sturgis
cc: Gifford, Mitchell, Israel, Ornstein, Taylor, Kolling, Pier, Willie-Sue
Dave Gifford and I compiled Juniper on the Dorado under XMesa 5 and the
following are the results:
Alto: 3 hours, 8 minutes.
Dorado: 20 minutes.
Karen
------------------------------------------------------------
*start*
00319 00024 US
Date: 10 Aug 1979 4:07 pm (Friday)
From: Ornstein
Subject: Ifu Changes
To: DoradoCore↑
cc:
I have written a memo describing the forthcoming changes to the IFU. It is on
[IVY]<Ornstein>IfuChanges.memo. I have distributed hardcopy of it to those of
you who I think are most interested.
Severo
*start*
00277 00024 US
Date: 13 AUG 1979 1108-PDT
From: MCDANIEL
Subject: Your name will appear in DoradoUsers.dl
To: Dorado Users Group:
Send a message to Jeannette Jenkins if you don't want that to
happen. The file will be [maxc]<secretary>DoradoUsers.dl
Gene
-------
*start*
00336 00024 US
Date: 13 AUG 1979 1907-PDT
From: MCDANIEL
Subject: new [ivy]<dorado>mema.dm
To: Dorado Core Group:
I've extended the cache data test in MemA. The alto debugging disk on
the "right hand" machine in the Dorado lab and the debugging disk associated
with the Dorado in the Dorado pen are updated.
gene
-------
*start*
01027 00024 US
Date: 19 AUG 1979 1522-PDT
From: MCDANIEL
Subject: Being a Dorado user
To: Dorado Users Group:
Welcome to the Dorado user's list. Using the Dorado is partially described in
a document you can find on [ivy]<DoradoDocs>DoradoUserOps.press. I have
attached a copy of that document to the public Dorado -- please make your
own copy rather than removing it. Ask me any questions you may have after reading
"DoradoUserOps.press".
Mesa, Lisp and Smalltalk run on the Dorado, as well as regular Alto emulation.
System developers have priority on the machine over users. There is a public
disk, usualy loaded in the Dorado, for everyone's use. See DoradoUserOps
regarding disks and disk files, and how to run the various emulators.
There is a log next to the Dorado terminal where hardware and system problems
can be recorded. If you encounter difficulties, please leave a note in the log.
DoradoUserOps discusses what information to put in the log if a hardware
failure occurs.
Enjoy,
Gene
-------
*start*
00432 00024 US
Date: 31 AUG 1979 1153-PDT
From: MCDANIEL
Subject: New version of Xmesa: long pointers
To: Dorado Users Group:
There is a new version of Dorado Mesa microcode that implements
the long pointer opcodes of Mesa. The compiler will not generate these opcodes
unless you employ the "/L" switch on the file you compile. These opcodes are in
addition to the facilities offered by standard XMesa.
Gene
-------
*start*
01388 00024 US
Date: 4 Sep 1979 4:52 pm (Tuesday)
From: Taft
Subject: Dorado Build procedures
To: DoradoCore↑
I have modified the Dorado Build procedures so that when a Multiwire board is
built an additional file is generated by Route and saved in the board dump file.
This file (whose extension is ".resist") is required by the Dorado board tester
program.
New versions of DoradoDisk.cm and DoradoFiles.dm have been released on
[Ivy]<DoradoLogic>. The files that have been changed are:
Route.run, Sil.run -- the latest released versions
MwBuild.cm, BuildBackupTemplate.cm
The procedures in Roger Bates's "Build Standards" memo are still correct, though
the listings of some of the command files no longer reflect reality.
The boards that have already been "built" and sent out to Multiwire (ContA,
ContB, ProcL, ProcH, and DskEth) will require a null Multiwire "rework" to
generate the .resist file. I will see that this gets done for those boards.
For the remaining boards, the .resist file will be generated whenever you
perform the next Multiwire build, so long as you have loaded the new versions
of the above-mentioned files before doing so.
Please load up the new DoradoFiles.dm right away, whether or not you have
already "built" your Multiwire board. The old DoradoFiles.dm is hereby
obsolete. If you have any questions or problems, please contact me.
Ed
*start*
00527 00024 US
Date: 7 SEP 1979 1920-PDT
From: MCDANIEL
Subject: new [ivy]<dorado>mema.dm
To: Dorado Core Group:
This release formalizes the extended cache data test and reverses
the order of the storage addressing and storage data tests.
I updated the Alto associated with the public Dorado only.
Charlie: When I worked with the "right"side Dorado I discovered
that the Mema version on the debugging disk was old & did not include
the extended cache data testing. You should update both
altos.
Gene
-------
*start*
00459 00024 US
Date: 16 SEP 1979 1406-PDT
From: MCDANIEL
Subject: new mema diagnostic
To: Dorado Core Group:
I have updated the binary file on the debuggin Alto for the public Dorado.
I exchanged my notebook of up-to-date listings for
the old one in the lab. The version of mema on the Altos in the lab is
defunct.
The changes are mostly organizational -- some code is smaller and I hope
some of the listings are easier to read.
gene
-------
*start*
02456 00024 US
Date: 17 Sep 1979 3:47 pm (Monday)
From: Taft
Subject: Dorado build revisions
To: DoradoCore↑
I have made some small modifications to Route and to some of the Build
Standards command files in order to generate a .Resist file that is more suitable
for board testing. Before you run Build again, you should be sure to load up
the contents of [Ivy]<DoradoLogic>DoradoFiles.dm.
I will see that the .Resist files get generated and inserted into the current dump
files for the following boards: ContA, ContB, ProcL, ProcH, MemX, and DskEth.
(However, owners of these boards should still update their disks from
DoradoFiles.dm in anticipation of reworks.) To my knowledge, the other boards
have not had their "final" builds done yet. Owners of these boards should do a
stitchweld rework (a null one if no further changes are required) and then a
Multiwire build. This will cause the .Resist file to be included in the new dump
files for both stitchweld and multiwire.
I have created a new command file MwReBuild.cm whose purpose is to do a
"rework" on a Multiwire board. This will be necessary to permit null reworks to
incorporate documentation changes, and to permit logic changes (cuts and
patches) to be formalized. Once you have built a Multiwire board, you must use
this command file (rather than MwBuild.cm) to incorporate such changes. (Of
course, if you eventually decide to build new Multiwire boards rather than
continuing to patch up existing ones, you should use MwBuild for that purpose.)
Unfortunately, due to disk space limitations, MwReBuild doesn't operate quite as
automatically as the other command files. What you have to do is the following:
(1) Do a stitchweld rev in the usual manner.
(2) Make sure you are backed up, as this procedure clobbers all stitchweld wire
lists.
(3) Execute @NewMwRev@
(4) Delete *.wl
(5) Load the wire list file from the multiwire dump file for the previous rev.
That is, load the .wl file from file
[Ivy]<DoradoLogic>@Board@-mwRev-@OldRev@.dm
Do not load any other files from that dump file!
(6) Execute @MwReBuild@.
(7) To get your disk back into shape for stitchwelding, execute @NewSwRev@ as
usual and then load the .wl file from the stitchweld dump file that you saved in
step 2. (Equivalently, rebuild the disk from scratch.)
I will update the "Build Standards" document to include this procedure if
someone will tell me where BuildStandars.bravo is!
Ed
*start*
00252 00024 US
Date: 17 Sep 1979 6:11 pm (Monday)
From: Taft
Subject: Dorado board tester
To: DoradoCore↑
I have written a memo describing the Dorado board tester hardware and software.
It is filed on [Ivy]<DoradoDocs>BoardTester.press.
Ed
*start*
00284 00024 US
Date: 18 Sep 1979 11:11 am (Tuesday)
From: Ornstein
Subject: Re: Dorado build revisions
In-reply-to: Your message of 17 Sep 1979 3:47 pm (Monday)
To: Taft
cc: DoradoCore↑
If you haven't been able to find Build Standards.bravo, we can call Roger and
ask him.
*start*
00265 00024 US
Date: 19 SEP 1979 1502-PDT
From: DEUTSCH
Subject: MicroD 8.13
To: Micro-Micro(D) Users:
This release fixes a minor bug -- certain 1- and 2-character symbols
would appear twice in the listing (and the .MB file). No other changes.
-------
*start*
00312 00024 US
Date: 20 SEP 1979 0923-PDT
From: FIALA
Subject: [Ivy]<DoradoDocs>BuildStandards.press
To: Dorado Core Group:
This new release of Roger Bates "Build Standards" document
incorporates Ed Taft's changes for generating .Resist files for the
board tester and some other edits by me.
-------
*start*
00500 00024 US
Date: 20 SEP 1979 0935-PDT
From: FIALA
Subject: Dorado Documentation
To: Dorado Users Group:
For any that are not yet aware, the following conventions are being
used for Dorado documentation:
[Ivy]<DoradoDocs> contains printable press files of all documents;
[Ivy]<DoradoSource> contains sources for all documents.
It is possible that we might someday move document sources into
<DoradoDocs> as well, but for the present the above conventions
are being used.
-------
*start*
00582 00024 US
Date: 21 Sep 1979 12:58 pm (Friday)
From: Ornstein
Subject: TASK LIST
To: DoradoCore↑
cc:
TASK PEOPLE
Chassis 4 Speed-Up - - - Herb, Charlie,....
MemC hard bug - - - Doug, (Severo)
Debug 2 DispY boards - - Ken, Herb, Charlie
Disk prom/TriconD consistency - - Gene
Debug Event Counters - - - Gene
Multi Dorados per Alto - - - Charlie, Ed Fiala
Boot microcode for OIS terminal - - Gene
Acquire OIS terminals - - - Ken, Haney
Investigate multiple MSA trouble Chassis 2 - Doug, Charlie,....
Long Cable on Ois terminal - - Charlie, Herb, Ken
*start*
00766 00024 US
Date: 21 Sep 1979 2:10 pm (Friday)
From: Ornstein
Subject: TASK LIST - Sept 21
To: DoradoCore↑
cc:
TASK PEOPLE
Chassis 4 Speed-Up - - - Herb, Charlie,....
MemC hard bug - - - Doug, (Severo)
Debug 2 DispY boards - - Ken, Herb, Charlie
Disk prom/TriconD consistency - - Gene
Debug Event Counters - - - Gene
Multi Dorados per Alto - - - Charlie, Ed Fiala
Boot microcode for OIS terminal - - Gene
Acquire OIS terminals - - - Ken, Haney
Investigate multiple MSA trouble Chassis 2 - Doug, Charlie,....
Long Cable on Ois terminal - - Charlie, Herb, Ken
Straighten out MemX Prom name screwup - Gene
Investigate OIS terminal zapping Dorado - Ken
Resist files/MultiWire reworking - - Ed Taft
Decide about MultiWire MemC - - Doug
*start*
00472 00024 US
Date: 25 SEP 1979 1140-PDT
From: FIALA
Subject: [Ivy]<DoradoLogic>
To: Dorado Core Group:
Ivy is starting to run low on disk storage, so I would like to
cleanup any stuff that is reasonable to delete. Would it be
reasonable to delete any of the obsolete board dumps in
<DoradoLogic>? If so, I would appreciate the owners
of the boards deleting what is not needed.
Also, what about the model 0 directories on Ivy? Can
they be purged?
-------
*start*
00351 00024 US
Date: 27 SEP 1979 2258-PDT
From: MCDANIEL
Subject: new [ivy]<doradodocs>DoradouserOps.press
To: Dorado Users Group:
The new version tries to be more helpful about initializing disks, and has
an expanded table of contents that may be more helpful, too. I have replaced
the copy by the Dorado in the Dorado pen.
gene
-------
*start*
01303 00024 US
Date: 28 Sep 1979 2:10 pm (Friday)
From: Pier
Subject: TASK LIST - September 28, 1979
To: DoradoCore↑
New Items:
Make resist files for DispY .......... Ken
Run DispY boards on tester ........ Mike
Archive and delete Model 0 IVY directories ......... Ed Taft
Clean up Model 1 IVY directories .......... Ken
Mark existing boards with null rev levels .......... Ken, Charlie
Prepare for issuing OIS machine to lab:
Booting microcode ..... Gene
OIS emulators for Lisp, Mesa, Smalltalk .... Willie-Sue
DispY boards working .... Ken,Herb,Charlie
Terminals working ....... Ken,Herb,Charlie
Old Items still pending:
Chassis 4 Speed-Up - - - Herb, Charlie,....
Debug 2 DispY boards - - Ken, Herb, Charlie
Debug Event Counters - - - Gene
Boot microcode for OIS terminal - - Gene
Investigate multiple MSA trouble Chassis 2 - Doug, Charlie,....
Long Cable on OIS terminal - - Charlie, Herb, Ken
Investigate OIS terminal zapping Dorado - Ken
Old Items successfully completed from last week:
MemC hard bug - - - Doug, (Severo)
Disk prom/TriconD consistency - - Gene
Multi Dorados per Alto - - - Charlie, Ed Fiala
Acquire OIS terminals - - - Ken, Haney
Straighten out MemX Prom name screwup - Gene
Resist files/MultiWire reworking - - Ed Taft
Decide about MultiWire MemC - - Doug
*start*
00287 00024 US
Date: 3 Oct 1979 8:36 pm (Wednesday)
From: Taft
Subject: Board tester
To: DoradoCore↑, Clark
I've released a new version of the Resist program, incorporating minor bug fixes
and improvements. Revised documentation is in
[Ivy]<DoradoDocs>BoardTester.press.
Ed
*start*
00417 00024 US
Date: 4 Oct 1979 9:57 am (Thursday)
From: Clark
Subject: 2 modules in alcove Dorado
To: doradocore↑
cc: Clark
Through super-human perseverance and dogged determination I finally managed
to get two modules to work in the alcove Dorado. I.e., I plugged 'em in and they
worked. Let's leave two there and one in the right-hand machine in the lab,
until H & C get time to debug some more.
Doug
*start*
00331 00024 US
Date: 4 Oct 1979 10:01 am (Thursday)
From: Clark
Subject: Memory change
To: doradousers↑
Most of you won't notice this or care about it, but for those who do:
The alcove Dorado now has two memory modules, and the right-hand machine
in the lab has one. This is the reverse of the former arrangement.
Doug
*start*
00566 00024 US
Date: 4 Oct 1979 11:00 am (Thursday)
From: Ornstein
Subject: Mice
To: Taylor
cc: Thacker, DoradoCore↑
To help out with the fact that the D0's don't presently have their own Mice,
Thacker and Ornstein have struck a deal whereby the Dorado gang will lend the
D0 gang 12 mice while awaiting delivery of those ordered for the D0's. It is
expected that the ordered Mice will arrive long before these 12 are needed for
their Dorados, but should that turn out not to be the case, it is agreed that we
will simply take back what is needed.
Severo
*start*
02844 00024 US
Date: 5 Oct 1979 4:05 pm (Friday)
From: Ornstein
Subject: TASK LIST - Oct 5, 1979
To: DoradoCore↑
cc:
New Items:
Fix Chassis 4's Alto - - - -Herb, Charlie
Verify the rest of Chassis 6 Backpanels - MSA slots Herb, Charlie
Reinstall boards in Chassis 4 - - - Herb, Charlie
Check out second Memory Module on Chassis 4 - Herb, Charlie
Put proper connector wings and cable on Chassis 3 for OIS terminal - Mike
Once Chassis 4 has been delivered:
Reclaim Chassis 2 and replace connector panels - Mike
Speed up chassis 2 - - -Herb, Charlie,....
Check out OIS terminal on chassis 2 - Ken, Herb, Charlie
Old Items still pending:
Chassis 4 Speed-Up - - - Herb, Charlie,....
Run remaining DispY board on tester - - Mike
Debug remaining DispY board - - Ken, Herb, Charlie
Boot microcode for OIS terminal - - Gene
Debug Event Counters - - - Gene
Long Cable on OIS terminal - - Charlie, Herb, Ken
Investigate OIS terminal zapping Dorado - Ken
Clean up Model 1 IVY directories - - Ken
Mark existing boards with null rev levels - Ken, Charlie
OIS emulators for Lisp, Mesa, Smalltalk - - Willie-Sue
Get Terminals working - - - Ken,Herb,Charlie
Old Items successfully completed from last week:
Run 1 DispY board on tester - - Mike
Debug 1 DispY board - - Ken, Herb, Charlie
Make resist files for DispY - - - Ken
Archive and delete Model 0 IVY directories - - Ed Taft
Investigate multiple MSA trouble Chassis 2 - Doug, Charlie,....
Comments:
1. Our intermediate range objective is to get to the point where we have two
machines running off one Alto in the Alcove (chassis 2 and 4) and one good
machine in the lab (chassis 3) and another (probably chassis 6 unless Mike
needs it to clean the connectors) being brought up in the lab. All these should
be "OIS" machines.
To get there from here:
Step 1. Get #4 back up and fix speed problem
Step 2. Verify that #4 works with 2 memory modules
Step 3. Ship #4 to alcove and reclaim #2
(This requires OIS boot microcode and OIS emulators)
Step 4. Fix connector panels on #2, speed it up, check out its
OIS terminal
Step 5. Re-install #2 in the alcove on the same Alto with #4
2. We presently believe that our timing goal should be:
With covers off - any and all software should run for at least short
periods with the clock set at 26 ns.
With covers on - any and all software should run indefinitely with the
clock set at 28 ns.
We believe we can reach this goal for stitchweld machines with a reasonable
amount of work. The story for Multiwire machines has yet to be told.
3. Gene's highest priority item is to get the OIS boot microcode working as it is in
series with shipping our first fully "OIS" machine - #4. It is believed this isn't a
big job. His next highest priority item is the Event Counters on the new IFU.
*start*
00518 00024 US
Date: 8 Oct 1979 5:58 pm (Monday)
From: DIEBERT
Subject: Problems with F10016 Counters.
To: DoradoCore↑
It has come to our attention, through much pain and anguish, that there exists a
problem with Fairchild F10016 counters, date coded 7801. This manifests itself as
a problem with the high order bit load or the carry out either not functioning or
messing up. I will contact Fairchild about this problem tomorrow to see if it is in
all parts or just the indicated date code.
Tim.......
*start*
01515 00024 US
Date: 9 OCT 1979 0951-PDT
From: MCDANIEL
Subject: Public Dorado's Mesa disk is new
To: Dorado Users Group:, Dorado Core Group:
There have been various problems with the Mesa disk on the public
Dorado. I have copied the Mesa disk from chassis 4 to the
public Dorado, and Mesa programs work once again. Public Dorado
users have probably lost some files.
Exactly what happened is uncertain. I BELIEVE (rather than know)
the following happened:
As the disk filled with more files, the alto executive
found itself unable to keep the system directory in
core. Exec gurus have warned me this may have unforseen
consequences.
It became necessary to scavenge the disk. For undetermined
reasons the scavenger reclaimed pieces of various .image
files.
Recall that .image files currently MUST reside on pages
whose address is no greater than the maximum address of
a model 31 disk. This is a temporary software limitation.
Those .image files that were not refetched from ivy would
not work because pieces of them were missing. Those .image
files refetched from ivy would not work because they got
allocated on pages illegal for .image files.
RECOMMENDATION:
If you run the scavenger & it reclaims .image files,
DELETE Garbage.$ before you refetch the .image files (that way
you reclaim the disk pages with "small" addresses.
In general, remember that the executive may not work correctly
if there are many files on the disk, so try to keep it cleaned up.
Gene
-------
*start*
01226 00024 US
Date: 9 OCT 1979 1849-PDT
From: FIALA
Subject: Dorado Hardware Manual Release
To: Dorado Users Group:
The 8 October 1979 version of the Dorado Hardware Manual is now released.
It is stored in 3 press files on [Ivy]<DoradoDocs>, DoradoManual-A.press,
DoradoManual-B.press, and DoradoManual-Figs.press.
Major changes since the 14 February 1979 release are as follows:
(1) New chapters on the disk, Ethernet, and display controllers;
(2) Replacement of Junk IO chapter by Other IO and Event Counters chapter;
(3) Revisions to Instruction Fetch Unit chapter reflecting hardware changes;
(4) Extensive revisions to The Map section of the Memory Section chapter;
(5) New figures at the end of the manual.
The four new chapters are my rewrites of material provided by R. Bates,
D. Boggs, K. Pier, and S. Ornstein.
This release of the manual includes all of the chapters which I have
planned for the "final" version of the manual; any future revisions will
probably be minor.
I am going to have some number of two-sided copies of the manual printed
during the next week or two. If you would like to have one reserved for
you, please sndmsg to me; I need to get some idea of how many to make.
-------
*start*
00295 00024 US
Date: 12 Oct 1979 10:21 am (Friday)
From: Clark
Subject: boards schedule
To: DoradoCore↑
The latest up-to-the-minute, hot-off-the-presses poop on boards and chassis
scheduling is on [ivy]<clark>DoradoBoards10-12.memo, .press.
I'll bring hardcopies to today's mtg.
Doug
*start*
00316 00024 US
Date: 12 OCT 1979 1044-PDT
From: MCDANIEL
Subject: the amazing microD
To: deutsch
cc: Dorado Core Group:
True, it failed to place a program 7756B words long.
On the other hand, it did place the slightly munched up
version of the same program: 7751B words.
good job Peter!
gene
-------
*start*
02079 00024 US
Date: 12 Oct 1979 2:41 pm (Friday)
From: Pier
Subject: TASK LIST - Oct 12, 1979
To: DoradoCore↑
New Items:
Debug General IO on new IFU - - - Gene
Debug baseboard for Chassis #6- - - Tim, Charlie
Add CountMiss signal to backpanels - - Mike
Once Chassis 4 has been delivered:
Reclaim Chassis 2 and replace connector panels - Mike
Speed up chassis 2 - - -Herb, Charlie,....
Check out OIS terminal on chassis 2 - Ken, Herb, Charlie
Chassis #3:
Get new multiwire ProcH made - - Doug, Rosemary
Test new ProcH - - - Herb, Charlie
Debug new ProcH - - - Tim, Charlie
New file system on disk - - - Willie-Sue
OIS boot proms- - - - Charlie
Speed up - - - - Charlie et al.
Fix DispY FIFO problem- - - Herb, Ken
Tune up OIS terminals- - - - Herb, Charlie
Discover schedule for OIS terminal deliveries- - Severo
IFU and DispY multiwire decision- - - Severo, Ken
Persue cooling problems- - - - Tim
Investigate publishing hardware manual- - - Dave Boggs
New board tester- - - - - Mike
DoradoUsers.dl ← DoradoCore.dl- - - - Ken
Old Items still pending:
Long Cable on OIS terminal - - - Tim
Investigate OIS terminal zapping Dorado - - Ken
Mark existing boards with null rev levels - Ken, Charlie
OIS emulator for SmallTalk - - Willie-Sue
Get Terminals working - - - Tim,Herb,Charlie
Old Items successfully completed from last week:
Fix Chassis 4's Alto - - - -Herb, Charlie
Verify the rest of Chassis 6 Backpanels - MSA slots Herb, Charlie
Reinstall boards in Chassis 4 - - - Herb, Charlie
Check out second Memory Module on Chassis 4 - Herb, Charlie
Put proper connector wings and cable on Chassis 3 for OIS terminal - Mike
Chassis 4 Speed-Up - - - Herb, Charlie,....
Run remaining DispY board on tester - - Mike
Debug remaining DispY board - - Ken, Herb, Charlie
Boot microcode for OIS terminal - - Gene
Debug Event Counters - - - Gene
Clean up Model 1 IVY directories - - Ken
OIS emulators for Lisp, Mesa - - Willie-Sue
Get Terminals working - - - Ken,Herb,Charlie
*start*
00518 00024 US
Date: 12 OCT 1979 1817-PDT
From: MCDANIEL
Subject: binding the new hardware manuals
To: Dorado Core Group:
I recommend geting your hardware manual bound with the spiral binder
rather than the cheshire binder. This alternative provides you with a
manual that you can open up flat on the desk, and one whose pages
won't begin to fall out over time.
If your hardware manual spends all its time closed, you may not
care.
gene
ps. kathi said she would also do the spiral binding.
g
-------
*start*
00457 00024 US
Date: 13 OCT 1979 1331-PDT
From: MCDANIEL
Subject: [ivy]<dorado>eventcounters.dm
To: Dorado Core Group:
Eventcounters is a new diagnostic that checks out the event counters
and the genIO logic on the new ifu board. It will not run on an old
style (RevB) board, and it will not run unless there is a back pannel
plug that connectes genIn to genOut.
For the moment the listings are in the front of the Ifu listings.
gene
-------
*start*
00525 00024 US
Date: 16 Oct 1979 4:15 pm (Tuesday)
From: DIEBERT
Subject: Dorado Acceptance Testing
To: DoradoCore↑
cc: DIEBERT
I am beginning to collect ideas as to what defines a working Dorado suitable for
shipment to users. The information that I seek is what constitutes an acceptable
set of programs to run in order to prove the reasonable functionality of each of
the currently available microcode subsystems. Any information you could supply
or any ideas on the subject would be greatly appreciated.
Tim.
*start*
00993 00024 US
Date: 17 Oct 1979 9:28 am (Wednesday)
From: Ornstein
Subject: Re: Dorado Acceptance Testing
In-reply-to: Your message of 16 Oct 1979 4:15 pm (Tuesday)
To: DIEBERT
cc: DoradoCore↑
We have generally run a "well known" set of diagnostics but have tended to
believe that when a machine reliably runs some set of miscellaneous Alto and
sample Mesa programs (one, for example, that repeatedly compiles a small
program), at some target speed, then the machine is considered working. Probably
we could fairly quickly name a set of stuff on Friday. (Whether this is a really
adequate set is another matter).
Another view is that machines have so far not suddenly left the lab into the real
world but rather users start using them while they're still in the lab. Since our
plan is to continually keep a "good" machine there along side the one that's
coming alive, we should probably encourage users to try to bust the "good"
machine before it cycles out of the lab.
Severo
*start*
00413 00024 US
Date: 17 Oct 1979 9:50 am (Wednesday)
From: DIEBERT.PA
Subject: Dorado s/n 4's Move to the Alcove
To: DoradoUsers↑
cc: DoradoCore↑, DIEBERT
This is to inform all of you that beginning at about 2:30 pm today Dorado s/n 2
will be replaced in the alcove by Dorado s/n 4. Since Dorado s/n 4 uses a new
file system all programs on the current s/n 2 disk will be copied to s/n 4's disk.
Tim
*start*
01375 00024 US
Date: 17 Oct 1979 10:00 am (Wednesday)
From: Pier
Subject: Re: Dorado Acceptance Testing
In-reply-to: Your message of 16 Oct 1979 4:15 pm (Tuesday)
To: DIEBERT
cc: DoradoCore↑
My candidates for "an acceptable set of programs" for us to run is quite small. I
think the right thing to do is to "alpha release" a machine to users by sending
an announcement to DoradoUsers.dl that another machine is available in the lab
for alpha friendly users. They will quickly uncover problems. If users are
disinclined to alpha test machines for us, they will get fairly green machines.
After say 10-12 hours of alpha test, as determined by the usual sign up sheet,
the machine leaves our lab. A first cut at an acceptable set of tests before alpha
release, for example:
all the microdiagnostics at 26 nsec (max) for stitchweld machines, buttoned up,
for several hundred iterations on everything except SBoard tests, and for several
iterations of SBoard tests.
Kinetic4 for ~1/4 hour at 26.
At 28 nsec, buttoned up:
Laurel for a few minutes, actually reading/sending mail;
Mesa compiler over a small but non trivial set of Mesa sources;
Mesa on a program that either tests Mesa itself (Mesa diagnostic?) or puts
recognizable patterns on the screen for ~1/4 hour;
Lisp diagnostics for 10-20 iterations;
SmallTalk image for a few minutes.
Comments solicited.
Ken
*start*
00357 00024 US
Date: 17 Oct 1979 2:54 pm (Wednesday)
From: Ornstein
Subject: Disk for Ed Taft
To: DoradoCore↑
cc:
Ed wants to double disk his machine. I'm proposing to give him the 2nd. disk on
the Dorado control Alto that has two. Anybody that thinks this is wrong, come
see me pronto and bring a solid argument (or a big club) along.
Severo
*start*
02228 00024 US
Date: 19 Oct 1979 3:12 pm (Friday)
From: Ornstein
Subject: TASK LIST - Oct 19, 1979
To: DoradoCore↑
cc:
*******************************************************************
New (and some old) Items:
Check out the PC MSA board when it's ready
Chassis #2
Verify that it still works - - Tim, Herb and Charlie
Verify that it's boards are all at latest rev Tim, Herb and Charlie
Be sure all backpanel fixes are in - Tim, Herb and Charlie
Bring it up to speed - - Tim, Herb and Charlie
Bring up OIS terminal - - Tim, Herb and Charlie
Chassis #3
Fix it (Ethernet, DispY intermittent, ?) Tim, Herb and Charlie
Ship either #2 or #3 - - - Tim, Herb and Charlie
Get Multiwire boards stuffed - - - - Mike
Try to Manufacture a wire-list for the PC MSA board - somehow - Ken
Bring board drawings and PS documents up to date and make 15 copies - Fiala
*******************************************************************
Old Items still pending:
Debug baseboard for Chassis #6 - - Tim, Herb and Charlie
IFU and DispY multiwire decision - - Severo, Ken
Pursue cooling problems - - - Tim
Cable problems on OIS terminal - - - Tim
New board tester - - - - Mike
Investigate OIS terminal zapping Dorado (semi-defunct item)) - Ken
*******************************************************************
Old Items successfully completed from last week:
Debug General IO on new IFU - - - Gene
Add CountMiss signal to backpanels - - Mike
Once Chassis 4 has been delivered:
Reclaim Chassis 2 and replace connector panels - Mike
Chassis #3:
Get new multiwire ProcH made - - Doug, Rosemary
Test new ProcH - - - Herb, Charlie
Debug new ProcH - - - Tim, Charlie
New file system on disk - - - Willie-Sue
OIS boot proms- - - - Charlie
Speed up - - - - Charlie et al.
Fix DispY FIFO problem- - - Herb, Ken
Tune up OIS terminals- - - - Herb, Charlie
Discover schedule for OIS terminal deliveries- - Severo
Investigate publishing hardware manual- - - Dave Boggs
DoradoUsers.dl ← DoradoCore.dl- - - - Ken
OIS emulator for SmallTalk - - Willie-Sue
Get Terminals working - - - Tim,Herb,Charlie
*start*
00530 00024 US
Date: 19 Oct 1979 3:15 pm (Friday)
From: Ornstein
Subject: Terminal Question
To: DoradoCore↑
cc:
I spoke to Thacker and Haney. They are not taking away any of our terminals
until more are available. The PCB's to make more are due next week. They have
a D0 nearly ready to deliver (for SSL) but no terminal for it. So they are
planning to let us use the D0 (without terminal) for our cable experiments etc.
until more terminals are ready (at which point they'll take it back and give it to
SSL).
Severo
*start*
00273 00024 US
Date: 24 Oct 1979 8:17 am (Wednesday)
From: Orr
Subject: Storage Board
To: DoradoCore↑
cc: Yeary
Some Good News! Our new PC storage board began playing Kinetic4 immediately
once Doug overcame one small obstacle [wrong chip type in Loc C1].
Herb
*start*
01781 00024 US
Date: 29 Oct 1979 9:29 am (Monday)
From: Ornstein
Subject: TASK LIST - Oct 26, 1979
To: DoradoCore↑
cc:
*******************************************************************
New Items:
Investigate the MemX problem - - - Ken, Tim
Fix Midas problems with running two machines - - - Fiala
PC MSA problem in Chassis 3 - - Doug, Herb, Charlie
NEWSFLASH - Doug found the problem - an unterminated
backpanel signal - (McCreight, don't bother to come back).
Sometime investigate the Fiala fix to the Alu=0 speed problem Everyone
*******************************************************************
Old Items still pending:
Finish up investigation of DispY/cable/terminal problem - Ken, Tim
Multiwire DispY - - - - Ken
Debug baseboard for Chassis #6 - - Tim, Herb and Charlie
Pursue cooling problems - - - - Tim
Multiwire IFU - - - - - Severo
Finish making std. dump files for PC MSA (mostly done) - - Ken
*******************************************************************
Old Items successfully completed from last week:
Check out the PC MSA board when it's ready
Chassis #2
Verify that it still works - - Tim, Herb and Charlie
Verify that it's boards are all at latest rev Tim, Herb and Charlie
Be sure all backpanel fixes are in - Tim, Herb and Charlie
Bring it up to speed - - Tim, Herb and Charlie
Bring up OIS terminal - - Tim, Herb and Charlie
Chassis #3
Mostly fixed - - Tim, Herb and Charlie
Bring board drawings and PS documents up to date and make 15 copies - Fiala
New board tester - - - - Mike
*******************************************************************
Old Items tossed out:
Investigate OIS terminal zapping Dorado (semi-defunct item) - Ken
*start*
00328 00024 US
Date: 30 Oct 1979 3:42 pm (Tuesday)
From: Clark
Subject: MemD rev for 4K chips
To: doradocore↑
MemD rev Ca in multiwire and stitchweld flavors is hereby declared finished. It
has been run yet again through the standard software, this time producing a
resist file. Files are in the usual places.
Doug
*start*
00482 00024 US
Date: 30 Oct 1979 6:23 pm PST (Tuesday)
From: Taft
Subject: Build standards
To: DoradoCore↑
At Ken's request, I have released a new [Ivy]<DoradoLogic>DoradoFiles.dm with
the following changes:
1. Includes the latest release of Sil (with the "new file" bug fixed).
2. Does NOT include RouteSB.br and RouteMwSB.br, which are board
characterizations for the D0 storage boards!
3. Includes a new DoradoDict.analyze describing ICs used on the PCMSA board.
Ed
*start*
01130 00024 US
Date: 1 Nov 1979 10:39 am (Thursday)
From: DIEBERT
Subject: Board Width
To: DoradoCore↑
cc: DIEBERT
The following table describes the board width world as it is now understood.
Board Type Fab Width Actual Width What Happened
Stichweld (old) 14.100 14.060-14.180 Vendor screw-up
Multiwire (old) 14.100 14.100 To Fab Info
Multiwire (new) 14.150 14.150 To Fab Info
MW/Stichweld 14.150 14.100 Vendor Screw-up
PCMSA 14.150 14.080-14.100 Vendor screw-up
The older chassis design allowed for the top dimension of the card cage to be
14.100 +/- a mfg tol of ~.025. The bottom dimension was adjustable to 14.100 by
the use of the mounting screws.
The newer chassis sheet metal design is set up for a top card cage dimension of
14.150 +/- a mfg tol of ~.025. The bottom dimension is adjustable from 13.950(?) to
14.200(?). This implies that the bottom of the cage is adjustable for all our cards
however the top is designed for 14.100 or 14.150 because of the bent sheetmetal.
Tim....
*start*
01221 00024 US
Date: 1 Nov 1979 12:53 pm (Thursday)
From: Ornstein
Subject: Re: Board Width
In-reply-to: Your message of 1 Nov 1979 10:39 am (Thursday)
To: DIEBERT
cc: DoradoCore↑
Since this is a critical issue, let's have Ken, Tim, Mike and me stay for a few
minutes after the Friday meeting to discuss whether where we're heading is into
a tolerable future or trouble. We should get the ground rules straight.
I personally believe that the following are essential minimum rules: (there may
be others)
1. The boards must fit the connectors - i.e. it must be relatively easy to insert
and remove them and they must bottom out cleanly against the stops in such a
way as to be properly positioned to make contact. It must be impossible to cock
any board so that it slips by the backstop on either side.
2. All the Model 1 boards and chassis should be interchangeable. Else we are
pushing troubles downstream into the laps of the poor guys who have to fix the
machines.
If we aren't presently meeting these minimum ground rules and don't have clear
plans to get to where we are, then if at all possible, we must develop such plans
immediately. Else, to quote a missing hero, we are in - DEEP YOGURT!
Severo
*start*
00342 00024 US
Date: 1 Nov 1979 1:56 pm (Thursday)
From: Pier
Subject: Re: Board Width
In-reply-to: Your message of 1 Nov 1979 12:53 pm (Thursday)
To: Ornstein
cc: DIEBERT, DoradoCore↑
I would like Doug and Ed Taft to consult as well, particularly since they
contributed to our preliminary discussions. Others are welcome to stay.
*start*
00477 00024 US
Date: 2 Nov 1979 9:03 am (Friday)
From: DIEBERT
Subject: Shipment of Dorado #3
To: DoradoCore↑
Charlie has indicated that he feels all of the problems have been worked out of
#3 and that it is ready to ship. If there are no large objections I propose that the
users are informed of the availability of #3 for use in the lab for alpha testing
for the next couple of days. If this shows no additional problems we ship
Monday afternoon or Tuesday.
Tim
*start*
00278 00024 US
Date: 2 Nov 1979 11:41 am (Friday)
From: Clark
Subject: latest printing of Dorado boards memo
To: doradocore↑
[ivy]<clark>DoradoBoards11-2.memo is the latest true poop. I will distribute
hardcopies at today's mtg to the first ten people to arrive.
D.
*start*
00505 00024 US
Date: 2 Nov 1979 12:03 pm (Friday)
From: DIEBERT.PA
Subject: Dorado s/n 3 In the Lab
To: DoradoUsers↑
This is to let all the users know that Dorado s/n 3 in the lab is available for use
on a first come first served basis for the next few days. The general idea is to get
some more time on the machine prior to moving it to the alcove next week. As
with any machine in the lab area there are no guaranties of reliability, however
we feel that the should be no dificulties.
Tim
*start*
01278 00024 US
Date: 2 Nov 1979 5:36 pm PST (Friday)
From: Taft
Subject: Correcting Mw wire lists
To: Clark, Pier, Diebert, Ornstein
cc: DoradoCore↑
I've release a program that corrects the coordinates in a Multiwire wire list so
that it can be used to run the stitchwelder on one of the new Mw-format
stitchweld boards. These are the operating instructions:
(1) Obtain [Ivy]<Dorado>CorrectMwWl.bcd. (This is a Mesa program, so you will
also need [Ivy]<Mesa>RunMesa.run and Mesa.image.)
(2) Load the .wl file from [Ivy]<DoradoLogic>xx-mwRev-yy.dm, for the board
you wish to build (xx = board name, yy = rev level).
(3) Issue the command
> CorrectMwWl xx-mwRev-yy.wl
(4) It will churn away for a while and produce two output files:
xx-mwRev-yy.cwl -- the corrected wire list file
xx-mwRev-yy.log -- a log of all the changes that were necessary.
(5) Give the xx-mwRev-yy.cwl file to Rosemary to build the board.
Eventually, when we are confident that this is all right, Ken will re-pack all the
multiwire dump files as appropriate, and Rosemary will then go back to using
the .wl files rather than the .cwl files.
This message is the sole documentation. I don't intend to write a memo, since I
hope that the need for this program will vanish quickly.
Ed
*start*
01458 00024 US
Date: 6 Nov 1979 10:17 am (Tuesday)
From: Ornstein
Subject: TASK LIST - Nov 2, 1979
To: DoradoCore↑
cc:
*******************************************************************
New Items:
Fix Stack Error so that it becomes a Mesa trap - - Gene
Check on MldDly on IFU not being readable by Midas - Charlie
Move #3 to alcove: #2 becomes the solid lab machine - Charlie, Tim
Add the corrected terminators to the PC MSA board documents - Mike
Fix up the Route troubles with the new Multiwire based SW board Ed Taft
Make a jig for aligning chassis - width and front to back - Tim, Mike
*******************************************************************
Old Items still pending:
Investigate OIS terminal zapping Dorado - - Tim
Multiwire DispY - - - - Ken
Multiwire IFU - - - - - Severo
Debug baseboard for Chassis #6 - - Tim, Herb and Charlie
Pursue cooling problems - - - - Tim
Sometime investigate the Fiala fix to the Alu=0 speed problem Everyone
*******************************************************************
Old Items successfully completed from last week:
Investigate the MemX problem - - - Ken, Tim
Fix Midas problems with running two machines - - - Fiala
Finish up investigation of DispY/cable/terminal problem - Ken, Tim
Finish making std. dump files for PC MSA (mostly done) - - Ken
PC MSA problem in Chassis 3 - - Doug, Herb, Charlie
*start*
00295 00024 US
Date: 7 Nov 1979 4:42 pm (Wednesday)
From: Ornstein
Subject: Model 0 Demise
To: DoradoCore↑
cc:
O.K. folks - unless one of you says WAIT, I'm going to let Mike wheel her away
for salvage. I propose a modest graveside funeral party for close friends Friday
lunchtime.
*start*
00325 00024 US
Date: 9 Nov 1979 4:04 pm (Friday)
From: diebert
Subject: Clean-up of disk space on s/n 2
To: DoradoCore↑
cc: Diebert
Could I please get a list of things on the mesa disk on s/n 2 that need to be
saved besides the obvious ones. I would like to get the disk cleaned up so we all
have more space.
Tim
*start*
00356 00024 US
Date: 9 Nov 1979 5:00 pm (Friday)
From: Clark
Subject: MSA rev Be
To: doradocore↑
would anybody out there who knows anything about MSA-Rev-Be that's "e" as
in "exasperated", please let me know pronto? Be is not on [ivy]<doradologic>,
nor has it been archived on [maxc]<d1logic>. Any information would be greatly
appreciated.
D.
*start*
01919 00024 US
Date: 10 Nov 1979 11:53 am (Saturday)
From: Ornstein
Subject: TASK LIST - Nov 9, 1979
To: DoradoCore↑
cc:
*******************************************************************
New Items:
Certify the Multiwire boards - checking speed also - - Charlie, Tim
Check on stray characters which show up on #3 and #4 - Willie Sue
Exercise Midas with all recent improvements HARD Gene, Ken, everyone
Exercise Simulator HARD - - - - Fiala
Bless the MW Ifu and DispY and send off to MW - Fiala, Mike
Pass all MW wirelists through Taft's corrector program and fix dump files - Ken
Debug the second PC MSA module - - - Charlie, Tim
look at signals on PC MSA boards - - - Charlie, Tim
Verify that PC MSA works with multiple (3 or 4) modules running Lisp in
chassis 2 - - - - - Charlie, Tim
Investigate other Pwr Supplies for the extra machines and spares - Mike
*******************************************************************
Old Items still pending:
Investigate OIS terminal zapping Dorado (hasn't happened lately) Tim
Debug baseboard for Chassis #6 (mostly done) - Tim, Herb and Charlie
Pursue cooling problems - - - - Tim
Make a jig for aligning chassis - width and front to back - Mike, Tim
Sometime investigate the Fiala fix to the Alu=0 speed problem Everyone
*******************************************************************
Old Items successfully completed from last week:
Multiwire DispY - - - - Ken
Multiwire IFU - - - - - Severo
Fix Stack Error so that it becomes a Mesa trap - - Gene
Check on MldDly on IFU not being readable by Midas - Charlie
Move #3 to alcove: #2 becomes the solid lab machine - Charlie, Tim
Add the corrected terminators to the PC MSA board documents - Mike
Fix up the Route troubles with the new Multiwire based SW board Ed Taft
*start*
00468 00024 US
Date: 12 Nov 1979 1:51 pm (Monday)
From: DIEBERT
Subject: Failing? ECL Parts per Board Tester
To: DoradoCore↑
After a check of 9 suspect bad 10210's from the board tester I can safely say that
the parts appear to be ok. There is no slowness or risetime difficulties. Therefore I
recommend that the tolerances be opened up to allow for what I believe to be
leakage current though parasitic diodes on the output of the devices.
Tim........
*start*
00416 00024 US
Date: 13 Nov 1979 12:46 pm PST (Tuesday)
From: Taft
Subject: Re: Failing? ECL Parts per Board Tester
In-reply-to: Your message of 12 Nov 1979 1:51 pm (Monday)
To: DIEBERT
cc: DoradoCore↑
I've revised the Resist program so that the error tolerance is a percentage of the
expected resistance rather than absolute, and I have changed the default to 12.
The documentation is revised also.
Ed
*start*
03246 00024 US
Date: 13 NOV 1979 1507-PST
From: FIALA
Subject: [Ivy]<Dorado>DoradoMidasRun.dm!33
To: DORADOUSERS:
This new release of Midas has the following changes from previous
releases:
1. Has muffler changes and simulator changes for the Rev-C IFU board and
two new registers EVCNTA and EVCNTB which are the event counters. The
IFU changes were backward compatible, so the new Midas will run on Dorados
that do not yet have the Rev-C IFU board, but the additional muffler signals
and the two new registers won't be meaningful with old IFU boards. Before
running "SimGo" or "SimTest" with an old IFU board, you must turn off
checking of the IFU section with the "Config" action.
2. Changes have been made to accommodate a 16K control store--no effect on
users until a 16K control store is built.
3. The symbol table handling has been speeded up substantially, resulting
in much faster response at breakpoints and other times at the expense of
about 1 to 2 seconds longer loading time.
4. Additional information is printed at breakpoints when the MIRDebug
feature is enabled to help find hardware failures in MIR or IMX.
5. IMBD (manifold read/write of control store) has been debugged to aid
debugging the control section.
6. The timer has been changed to show the elapsed compute time since
the start of any Midas action. This means that during a "Go", "Test",
or similar action, you can tell how long the machine has been running
by looking at the timer.
7. There are now two different initial display configurations for Midas.
When you first attach to a particular Dorado, the right display column
shows the board temperatures and power supply voltages and currents;
these are the only items that can be monitored while a Dorado is running.
When you do a "RunProg" action the right column switches to show the
information relevant when testing the hardware directly from Midas with
"Test" or "TestAll". etc.
8. The remaining bugs in operating multiple machine from a single Alto
running Midas are believed fixed. It should now be the case that you
can detach/attach from/to different machines without disturbing a "Go"
in progress. However, you will lose the symbols and display configuration
when you detach and later reattach to a particular serial number.
9. The operation of "Passive" mode has been changed as follows: There are
now three states "Active" (i.e., normal), "PrePassive", and "Passive."
The current mode will appear as an action in the command menu; if you bug
it, then you will sequence to the next of the three modes, which are in a
ring. The new PrePassive mode allows you to operate the hardware in
active mode until you do a "Go," "SS," etc.; at the next breakpoint the
machine will enter Passive mode. See the Midas Manual for more details
about this.
10. Several bugs in the "PEscan" action have been fixed.
11. The default memory when new items are displayed has been changed from
IM or IMX to VM. This means that if you type a number on the input text
line and examine it in some name-value menu, then the VM word is displayed.
12. Several new hardware tests appear as subcommands to the "HWChk" action;
read Midas Manual for details.
Enjoy; report any bugs.
-------
*start*
00729 00024 US
Date: 13 NOV 1979 1525-PST
From: FIALA
Subject: [Ivy]<Dorado>DoradoUnbugDisk.cm
To: DORADOUSERS:
A command file is available for creating Alto disks to be used for
hardware checkout or microcode development on Dorado. To set up
a disk for this purpose:
1) Obtain a blank disk and install the OS with the long option and
ERASE the disk.
2) When that finishes retrive the above named command file with FTP
and execute it.
This finishes with the standard .MB, .MIDAS, etc. files needed for
hardware checkout and running microcode. During FTP you may encounter
an error such as "DoradoBaseRom" doesn't exist; if you do, type carriage
return to continue.
Please report any problems with this.
-------
*start*
00317 00024 US
Date: 13 Nov 1979 5:04 pm (Tuesday)
From: DIEBERT
Subject: Terminal Cable Length
To: DoradoCore↑
cc: Thacker
There is a memo filed on [IVY]<DIEBERT>TerminalCable.press or .memo
documenting the suggested maximum terminal cable length for D0 and Dorado. I
hope you find it enlightening.
Tim
*start*
00476 00024 US
Date: 15 Nov 1979 2:11 pm (Thursday)
From: Clark
Subject: let's buy them by the gross
To: doradocore↑
Tim and I have just checked out the last few details on the PC MSA boards, as
per Ken's msg of a few weeks ago. All looks good: no clock glitches for the Sout
rcvrs; 8 ns of HOLD time on the Shift/Load signal (vs. 0 spec) at clocks from 26
to 34 ns.; nothing excessively bad on the power lines to the RAMs.
Let's have Mike order a zillion.
Doug
*start*
00246 00024 US
Date: 16 Nov 1979 12:16 pm (Friday)
From: Clark
Subject: dorado board schedule
To: doradocore↑
The very latest info on board scheduling can be found on
[ivy]<clark>DoradoBoards11-16.memo
Hardcopies at today's mtg.
Doug
*start*
01560 00024 US
Date: 16 Nov 1979 3:32 pm (Friday)
From: Pier
Subject: TASK LIST - Nov 16, 1979
To: DoradoCore↑
*******************************************************************
New Items:
Check out Model 0 MSA from rework- - - Doug
PE Scan in CacheA bug - - - -Doug, Fiala, Ken
Inform McCreight about BaseBd ROUTE problem - - Severo, Doug
*********************************************************** ** ** *
Old Items still pending:
Certify the Multiwire boards - checking speed also - - Charlie, Tim
Exercise Simulator HARD - - - - Fiala
Bless the MW Ifu and DispY and send off to MW - Fiala, Mike
Pass all MW wirelists through Taft's corrector program and fix dump files - Ken
Debug the second PC MSA module - - - Charlie, Tim
Verify that PC MSA works with multiple (3 or 4) modules running Lisp in
chassis 2 - - - - - Charlie, Tim
Investigate other Pwr Supplies for the extra machines and spares - Mike
Investigate OIS terminal zapping Dorado (hasn't happened lately) Tim
Pursue cooling problems - - - - Tim
Make a jig for aligning chassis - width and front to back - Mike, Tim
Sometime investigate the Fiala fix to the Alu=0 speed problem Everyone
*******************************************************************
Old Items successfully completed from last week:
Debug baseboard for Chassis #6 (mostly done) - Tim, Herb and Charlie
look at signals on PC MSA boards - -- Charlie, Tim
Check on stray characters which show up on #3 and #4 - Willie Sue
*start*
00238 00024 US
Date: 16 NOV 1979 1539-PST
From: FIALA
Subject: [Ivy]<DoradoDocs>DoradoMidas.press
To: DORADOUSERS:
This new release of the Dorado Midas Manual documents the new features
in the latest release of Midas.
-------
*start*
00255 00024 US
Date: 16 Nov 1979 4:01 pm (Friday)
From: DIEBERT
Subject: 1 Megaword memory
To: DoradoCore↑
It seems that a Dorado will run with 1 megaword of memory. One module of this
experiment was PCMSA's so buy a zillion of um.......
Tim
*start*
00368 00024 US
Date: 16 Nov 1979 4:29 pm (Friday)
From: Willie-Sue.PA
Subject: bravo
To: DoradoUsers↑
The problems kicked up when running Bravo on the dorados (display
jumping, garbage characters, occasional display polarity reversal) have been
solved. New microcode for all the emulators will appear early next week, so
hang on 'til then.
Willie Sue
*start*
01418 00024 US
Date: 27 NOV 1979 0029-PST
From: FIALA
Subject: [Ivy]<Dorado>DoradoMidasRun.dm!35
To: DORADOUSERS:
This new release of Midas fixes bugs in PEscan of CACHEA and CACHED memories.
Also, ESTAT, which was formerly a read-only DMux address, is now a register,
and the error halt enables reported in ESTAT can be modified by writing
into the register. The error-reporting bits in ESTAT are read-only, however.
This means that it is possible to modify the halt conditions without doing
a full "Reset" action, and it is possible to "Test" ESTAT for hardware
checkout purposes.
Finally, a new (fake) register called AATOVA has been added so that absolute
addresses can be translated into virtual addresses. This works as follows:
(1) Display the AATOVA register;
(2) Write any absolute address into the register; the display will then
show either the virtual address equivalent to the value you wrote, or 177777
if the absolute address was not in the virtual memory; in addition, the
symbolic equivalent of the virtual address is printed on the comment
lines.
It is expected that AATOVA will be used, for example, when return links
have been stored in RM locations; you can right-button the (absolute)
value in the RM location onto the input line and then left-button that
into AATOVA to translate into the virtual address.
Documentation on [Ivy]<DoradoDocs>DoradoMidas.press is current.
-------
*start*
00580 00024 US
Date: 29 NOV 1979 2216-PST
From: DEUTSCH
Subject: Release of MicroD 9.1
To: Micro-Micro(D) Users:
This release incorporates some substantial internal changes in preparation for
the Dorado 16K control RAM. It uses the Swatee file as a scratch file, and it
is significantly faster than the previous release (~10 seconds on a full
4K control RAM).
Please report problems to me ASAP. I will be on the East Coast for the first
six months of 1980, and it is likely that problems with Micro or MicroD
during that time will receive little attention.
-------
*start*
00349 00024 US
Date: 1 DEC 1979 1542-PST
From: DEUTSCH
Subject: MicroD 9.1 withdrawn; 9.2 released
To: Micro-Micro(D) Users:
MicroD 9.1 had a bug which caused it to crash, rather than providing an
error message (no /x) or continuing properly (/x), if there were any
undefined symbols. MicroD 9.2, now released, fixes this bug.
-------
*start*
00592 00024 US
Date: 2 Dec 1979 7:22 pm PST (Sunday)
From: Taft.PA
Subject: Dorado processor bug/feature
To: DoradoUsers↑
I've discovered a new "feature" of the Dorado processor, namely that it is not
possible to load StkP← in an instruction that also references the stack. For
example, the instruction:
T← Stack, StkP← T;
would be expected to read the stack using the old StkP, then load StkP with the
new value. In reality, the stack read takes place correctly, but the StkP← load is
ignored. This restriction will be documented in the Dorado hardware manual
eventually.
Ed
*start*
00591 00024 US
Date: 3 Dec 1979 10:38 am (Monday)
From: DIEBERT
Subject: Fairchild 10016
To: DoradoCore↑
I finally got a response from Fairchild on the 10016 problem. I seems that in
addition to the poor testing during the 1977 early 1978 season, some of the ECL
parts manufactured during that time were mismarked. I seems that about 50%+ of
10016's are really 10126's. This is a problem that really bit Fairchild in the ass in
the early part of 1978, however has not been much of a problem since. I will
contact the local Fairchild people about replacing all of our stock.
Tim
*start*
01039 00024 US
Date: 3 Dec 1979 8:24 pm PST (Monday)
From: Taft
Subject: Found it!
To: McDaniel
cc: DoradoCore↑
(The bug that causes the display to go bananas while my new IFU-based Alto
emulator is running, that is.)
The problem is in the feature that sets RBase←1 when you do an IFUJump.
Unfortunately, the bug is on the ProcL board. The RBase modification is made to
take effect during the first instruction of the new opcode by wire-ORing the
RBase bit directly onto RbAdr. Unfortunately, if a task switch takes place in
between, the bit is wire-ORed onto the new task's RBase. In this case, this had
the effect of modifying AChannelRegion to DHTRegion, and the first instruction
of DWT would read its R-register from the wrong bank.
I worked out a simple, one-wire patch, and installed it in the machine in the
lab. It seems to fix the problem, but I think someone who knows what he is
doing should examine the fix carefully, as I've not thought through all the
ramifications involving Hold, RepeatCurrent, etc.
Ed
*start*
00477 00024 US
Date: 5 Dec 1979 3:01 pm (Wednesday)
From: DIEBERT
Subject: Dorado Cooling Improvements
To: DoradoCore↑
There is filed on [IVY]<DIEBERT>DoradoCooling.press a report summarizing the
cooling experiments I have been doing for the last three weeks or so. The results
are interesting and I think they represent a substantial improvement over the
current design. If there are any experiments that I have overlooked please bring
them to my attention.
Tim
*start*
00246 00024 US
Date: 6 DEC 1979 1512-PST
From: MCDANIEL
Subject: new [ivy]<doradologic>doradoProms.run
To: Dorado Core Group:
I have updated the DoradoProms program to reflect changes made by Boggs for
the DskEth board.
Gene
-------
*start*
00188 00024 US
Date: 13 DEC 1979 2040-PST
From: DEUTSCH
Subject: MicroD 9.4
To: Micro-Micro(D) Users:
Now released. Internal changes and performance improvements only.
------
*start*
00422 00024 US
Date: 19 DEC 1979 1524-PST
From: MCDANIEL
Subject: new Dorado mesa microcode
To: DORADOUSERS:
There is a new version of the mesa microcode that uses Ed Taft's new Ifu based
Nova emulator, and that implements long bitblt, the IME opcodes and has
other, miscellaneous enhancements. Ed Taft will assume future development
responsibility for the Mesa microcode on the Dorado.
Enjoy,
Gene
-------
*start*
00790 00024 US
Date: 20 Dec 1979 1:09 pm (Thursday)
From: Ornstein
Subject: Multiwire
To: DoradoCore↑
cc:
The good news is that six of the seven boards are being shipped this afternoon or
tomorrow morning - together with the overdue MemC. (I couldn't find out why
MemC was so late.) The bad news is that seventh (the DskEth) ran afoul of their
attempts to avoid the "wandering-wire" problem by lowering the laminating
pressure: it failed to laminate adequately. So I snarled alot and then, seeing that
it was the DskEth and Christmas and listening to him sniffling and cowering at
the other end of the line, allowed as how if it shipped on Jan 4 and everything
was all PERFECT with all the boards, we MIGHT be willing to overlook the
delay.
Merry Christmas Multiwire,
Screwge
*start*
01155 00024 US
Date: 26 DEC 1979 1232-PST
From: DEUTSCH
Subject: New (and final) release of Micro
To: Micro-Micro(D) Users:
A new Micro is now on [Maxc]<Alto>. This is almost certainly the last release
of Micro for the next six months, since I will be at MIT and no one has
agreed to take responsibility for Micro while I am gone.
New features:
1) Micro now writes its version, the date and time of assembly, the entire
command line, and the time and statistics summary on the .ER file (just as
MicroD does on the .DLS file).
2) There is a multi-statement conditional assembly feature. Documentation
will be forthcoming. The syntactic extension used to implement it is backward-
compatible, i.e. no existing valid program will need changing.
3) There is a tracing feature which may be useful for debugging complex
macros. Documentation on this feature will also be available soon.
Symbol tables (.ST files) produced by this release are NOT COMPATIBLE with
older versions of Micro, and vice versa. Micro detects this incompatibility
and refuses to do a /R from an incompatible .ST file.
Merry Christmas! Happy New Year!
P. D.
-------