Inter-Office MemorandumToDorado GroupDate19 September 1979FromRoger BatesLocationPalo AltoSubjectBuild StandardsOrganizationCSLXEROX Filed on:[Ivy]BuildStandards.pressSources on:[Ivy]BuildStandards.dmThis memo describes how to convert an existing set of drawings into the "standard" Dorado buildsystem. References made to rev in the following description should be replaced by the currentrev level of your board.The essential changes implemented in this process are:Use font 1 italic for small italics and free up font 2Use font 2 for Template64 font for arcs and diagonal lines in commentsChange the default from bold font 0 and 1 to normal face font 0 and 1Make minor changes to the title block for esthetic reasonsPick a file naming convention where the "rev" is in all generated filesDisk InitializationThe procedure is best performed by starting from scratch with a new disk. If you don't do this,you stand the risk of running out of disk space due to the presence of unnecessary files on yourdisk. You should go through the following incantation:Load a fresh disk and boot the Ether Executive;Run NewOs.boot;Install with long dialogue and ERASE the disk;When the dust settles, retrieve [IVY]DoradoDisk.cm;Execute the "DoradoDisk.cm" command file;When the dust settles again, load [IVY]DoradoFiles.dmInitialize Sil with Sil/ILoad from your last board dump file the current ".wl" file and all sil drawings--nothing elseThe files contained in [IVY]DoradoFiles.dm are ordered in INVERSE order ofimportance, so that you should run FTP in interactive mode, look at the files as they arepresented and skip (DEL key) the files you don't need. Once you get the file Sil.run you shouldcontinue and accept all files.The files contained are:]gpi bq`rX -q7Br ]q`r -q7Br Xxq`r-q 7BrSsr Ms% K $ F5* Dtr< C ?6x<76x:lFx8Ex6:x5 G /u ,r?! *` (7x%w/x#x!.x @xK)xBxxT xN Y M   ^A \Build Standards2User.cm"standard" Dorado-User.cm fileSendBuild.chatcmTemplate for chat command to archive .dm fileRouteSB.br RouteMWSB.brBoard characterization for the MSA boardTtlDict.analyze Sil.lb5 Sil.lb6TTL stuff - only get if necessaryRoutemlb.br RouteMwlb.brBoard characterization for the Logic boardSil.run Analyze.run Route.run Build.runAll required run programsSil.lb7 Sil.lb8 Dorado.lb9ECL component library filesEclDict.analyze DoradoDict.analyzeRequired dictionary filesNewSwRev SwBuild.cm SwReBuild.cmCommand files for stitchweld boardsNewMwRev MwBuild.cm MwReBuild.cm Command files for multiwire boardsBuildBackupTemplate.cm command file for actions after running Route(These files are enumerated in [Ivy]DoradoFiles.cm.) I recommend that you skipunnecessary files to avoid problems with full disks. When in doubt, retrieve the file, then deletelater if you haven't used it. TtlDict.analyze, Sil.lb5, and Sil.lb6 will be required on some boardsthat do not use any TTL components because some terminators are defined in these files. User.cmThe User.cm file supplied defines the Sil fonts and Libraries etc. It defines a Bravo init macroused in BuildBackupTemplate.cm and also defines the Bravo fonts such that a minimum of fontfiles are required on the disk. The DoradoDisk.cm command file also does "copy SysFont.al _Helvetica10.al" so that Type.run will print wirelist files semi-reasonably.Wire List fileChange the name of your current ".wl" file to Board-Rev-rev.wlBoard Specific filesYou will have to create four files as follows:File NameContents"Board"Board name such as "ProcL""Slot"Slot number such as "s04""Rev"Current existing rev such as "Cf""Addendum"Space, optional switches, or added sil files for BuildThe files (except "Addendum") must contain exactly the text specified, with no leading spaces ortrailing spaces or carriage returns.The catch-all file "Addendum" is called from all of the Build-invoking command files. It allowsyou to include commands to build which are not in the standard command files, or to include silfiles which will not be caught by the standard expansion of "Board##.sil" entry.In addition to these files which you must create, other files "OldRev" and "OldOldRev" will becreated by sucessive reworks to a board as they are needed. frGxbAq.x`.-x_.#x^.x\.%x[\'.xY.xX".xW9.xU".xTw.% Q)rD O^-6 M X KH Fu CTitle-Rev-Ab.sil and edit the file as appropriate. when you aredone, you should rename it to Board-Rev-rev.sil and delete you old title page and Title-Rev-Ab.sil.Note: the title page does not have Title block entry for "page" number, rather it has a place foryou to manually enter the page number of the last page. Note that Analyze will flag a level 1error (warning) that it could not find the page number, but this is OK.Standardizing Your Sil DrawingsYou will need to go through each drawing and perform the following manipulation.Change all font 2 strings to font 1 italic using the followings commands:^V 2select all strings in font 2^J 1Jam selected strings to font 1^J iJam selected strings to italicSelect "XEROX" and "PARC" in the title block and Jam boldMove the right end of the title block to match the end of the build marks. i.e. move theright most line left 2 grid 4 units (location x=564)Set the "boldness" of all font 0 strings within your drawing as desired.If you have a temperature sensor on the board, you should change the name of the platform fromPLAT to TEMP. This will cause Route to put "LM3911+20K" in the loading chart.In preparation for multiwire, you must declare any unused sockets that you want available forfuture fixes so that route will have the pins drilled in the multiwire board. The macro "L" inDorado.lb9 is a macro named SPARE with pins 1,16 and 8 declared so that you can connectthem to the signal "Whatever".I would like to see all muffler input drawings changed to make use of Dorado.lb9 macros "@"and "#". These make it easier to locate signal bits within the midas muffler words.Command Files for the Build ProcessAfter completing the preliminary procedures above, you are ready to embark on a rework of theexisting stitchweld board. To do this, you first execute the "NewSwRev.cm" command file onceonly; then you execute "SwReBuild.cm" as many times as necessary to get through withouterrors. The "SwBuild.cm" file is also provided to generate a brand new stitchweld board (i.e., anew design or major rev)."NewMwRev.cm," "MwReBuild.cm," and "MwBuild.cm" are the equivalent command files formultiwire boards.Below are listings and brief descriptions of these command files. To allow for human interaction frG bu ^r40 \trtr) [(9 YKO WG Pu MMrPxIIFiWDWBWx?atr!x;Dx:$4x6H 3@ S 1uN .F ,8M *mG ( %0D #eT Ku# r@ Xt CrK xH  ;6 p :' & B ]SBuild Standards4with command files, there are occasional calls on non-existent files, which will cause theoperating system to interrogate the user for the contents of the non-existent file. There are twogeneral situations when this occurs:In the command files that invoke Build, a call of the file "Switches" is made. At thispoint it is appropriate to type "CR" for all things standard, "ACR" to force Analyze to runon all files, "4CR" to restart at Route, or "6CR" to restart after Route.Within BuildBackupTemplate.cm, each operation is preceded by a call on some disk filesuch as "@DoNewPrescan@". If you want to perform the operation, then type "CR"; ifyou dont, type "//CR" to turn the operation into a comment. If you always want toexecute some action, you may define the appropriate file as containing nothing.@NewSwRev.cm@ is executed to cause appropriate name changes and deletion of old files inpreparation for generating a NEW stitchweld REV for your board. You should execute thiscommand file once and only once before a new rev. Before running, be sure that "Rev" containsthe current rev for your board, and that "OldRev" (if is exists) contains the last stitchweld rev foryour board. (The first time you carry out the build process there will be some confusion aboutfiles "OldRev" and OldOldRev" that don't exist--plunge on fearlessly). Its contents are:Delete *.press *.wlOldDelete *.ad *.bp *.comments *.er *.re *.pe *.lc *.ps *-E.nl *-C.nl *.inl *.mh *.mhi *.mwcopy OldOldRev _ OldRevcopy OldRev _ RevBravo/n RevRename @Board@-Rev-@Rev@.sil _ *Rev-##.sil //rename the sil title pageDelete *Rev-##.nl //Delete title page .nl file - Buildd will re-AnalyzeDelete @Board@-Rev-@OldOldRev@.wl //delete any very old wirelist fileDelete *-mwRev-##.wl //delete any multiwire wirelist file//Finally, clean up the system directory for speed and disk pagesFtp MAXC retrieve/c CleanDir.runCleanDir SysDir 2000Delete CleanDir.run@SwReBuild.cm@ is executed to rework a stitchweld board. It will invoke Route in reworkmode, using the ".wl" file from the existing board (OldRev) as the basis for the rework. This willcause the build process to be invoked, and should generate a new "null" rev of your board; allfiles generated by Analyze and Route will have the "Rev" level in their names. The need for"tentative" mode has gone away, since ".wl" is no longer copied into ".wlold", and therefore nofile information is lost during the normal build process. You may now invoke SwRebuild.cm asmany times as necessary to get through without errors. Its contents are:// SwReBuild.cm -- last modified September 10, 1979 5:24 PM by TaftBuild/RC@switches@ @Rev@/R E/GM @Slot@/GL RouteMLb.br/GB /GR ^@Board@-Rev-@OldRev@.wl/GC ^0/p @Board@-Rev-@Rev@.sil @Board@##.sil @Addendum@@SwBuild.cm@ is executed to create a stitchweld board from scratch (i.e., a new design or amajor revision). Its contents are:// SwBuild.cm -- last modified September 10, 1979 5:24 PM by TaftBuild/R@switches@ @Rev@/R E/GM @Slot@/GL RouteMLb.br/GB /GR ^0/p @Board@-Rev-@Rev@.sil @Board@##.sil @Addendum@ frG btA `S3r ^$x[CxYKtrtrxWtrtrxT-(xRC5trxPxtr"xNO K;.* IpD G tr# Ea D? BDYx?qx>!Xx<x;_x9 x8Gx7 IxqDx>xx?2 rL &#xdqBx =x A2  A \%Build Standards5@NewMwRev.cm@ is similar to NewSwRev.cm; it is executed once and only once, when youhave a working stitchweld board and you want to build the equivalent multiwire board. It deletesall unnecessary files, and renames the Title page name to Board-mwRev-rev.sil as the conventionto indicate a set of multiwire files. Its contents are:Delete *.press *.wlOldDelete *.ad *.bp *.comments *.er *.re *.pe *.lc *.ps *-E.nl *-C.nl *.inl *.mh *.mhi *.mwRename @Board@-mwRev-@Rev@.sil _ *Rev-##.sil //rename the sil title pageDelete *Rev-##.nl //Delete title page .nl file - Buildd will re-AnalyzeDelete @Board@-Rev-@OldRev@.wl //delete any old wirelist fileDelete *-mwRev-##.wl //delete any multiwire wirelist file//Finally, clean up the system directory for speed and disk pagesFtp MAXC retrieve/c CleanDir.runCleanDir SysDir 2000Delete CleanDir.run@MwBuild.cm@ is executed to create a multiwire board from scratch. No new errors shouldoccur except possibly those associated with power pin connections. The multiwire board hasnumerous restrictions about non-standard ECL power on pins 1,8, and 16.// MwBuild.cm -- last modified September 10, 1979 5:24 PM by TaftBuild/RM@switches@ @Rev@/R E/GM @Slot@/GL RouteMwLb.br/GB /GR ^0/p @Board@-mwRev-@Rev@.sil @Board@##.sil @Addendum@Note: if errors do occur during this operation, you should repair them and re-run @MwBuild.cm@as many times as is required. Then, assuming that no corresponding stitchweld boards haveactually been fabricated, you should retract the current stitchweld rev and redo it. That is, reloadfiles Board-Rev-OldRev.wl, Rev, OldRev, and OldOldRev from Board-Rev-OldRev.dm, execute@NewSwRev.cm@, and then execute @SwReBuild.cm@. On the other hand, if stitchweldboards for rev have already been fabricated, you should of course make a new rev (bothstitchweld and multiwire).@MwReBuild.cm@ - This command file is used to generate a multiwire "rework". Of course, it isnot actually possible to rework a multiwire board, but this is useful to formalize changesimplemented by means of cuts and patches, or to perform null revs for documentation purposes.// MwReBuild.cm -- last modified September 10, 1979 5:24 PM by TaftBuild/RCM@switches@ @Rev@/R E/GM @Slot@/GL RouteMwLb.br/GB /GR ^@Board@-mwRev-@OldRev@.wl/GC ^0/p @Board@-mwRev-@Rev@.sil @Board@##.sil @Addendum@Due to disk space limitations, this command file is not quite as automatic as the others; itrequires a few manual steps to delete and reload .wl files. To begin a multiwire rework, firstmake sure you are completely backed up. Execute @NewMwRev.cm@ (as usual), delete *.wl,load Board-mwRev-OldRev.wl from Board-mwRev-OldRev.dm, and then execute@MwReBuild.cm@ to invoke the Build process. When you are done multiwiring, delete *.wl andreload Board-Rev-rev.wl from Board-Rev-rev.dm in preparation for any future stitchweld rework.In executing any of the above build command files, "BuildBackupTemplate.cm" will be processedby Build when finishing processing of a board. Build replaces the "$Z" entries per the buildmanual, and passes the results to the executive in Com.Cm. Its contents are:// BuildBackupTemplate.cm -- last modified September 12, 1979 6:07 PM by Taft frG b8tr `S,5 ^36^118^tr \8xYqxXXxW9IxUHxTw>xS:xPTAxN&xMxL1 HrF G[ EMGxBqBx??x>h4 ;rV 9O-- 705 5trtr$trt>Y5bB5r 33 2# tr: 0X ,A +H )PAx&qDx#@x"kx! 4 r0, E &> [tr\1[ty[rtr-A1/r[t2^7[r "9 trtrtrtr SM ./ Mx qN A ]2lBuild Standards6//Check things out ** Shift-SWAT ** to aborttype $ZN.e# $ZN.re $ZCN.ad@DoNewPrescan@Analyze/p $ZAN.sil//Make a dump file for IVY@DumpToIVY@ftp ivy connect/c DoradoLogic dump/c $ZN.dm $ZCN.ad $ZN.wl $ZN.lc $ZN.resist $ZMN.mw$ZMN.mh $ZMN.mhi $ZN.bp $ZRN-E.nl $ZRN-C.nl $ZAN.sil *Rev Board Slot Addendum $ZLF//Make a dump file for MAXC archiving@DumpToMAXC@ftp maxc/c connect/c d1logic dump/c $ZN.dm $ZCN.ad $ZN.wl $ZN.lc $ZN.resist $ZMN.mw$ZMN.mh $ZMN.mhi $ZN.bp $ZRN-E.nl $ZRN-C.nl $ZAN.sil *Rev Board Slot Addendum $ZLF//Delete the multiwire files just dumped to make room for the Drawing file!!!@DeleteMultiwireFiles@Delete $ZMN.mw $ZMN.mh $ZMN.mhi $ZMN.resist@DoNewDrawings@sil/p 6/x $ZAN.sil@SendDrawings@ftp ivy connect/c DoradoDrawings store/s sil.press $ZN.press store/c $ZN.ps//Now make up a message and send to Rosemary@DoReworkMessage@Bravo/n sendBuild.chatCm@SendReworkMessage@chat sendbuild.chatCm/D@MakeListings@empress Sil.press //drawings - need more double sided copies@MakeListings@Bravo/h $ZN.ps //prescan - need more double sided copies@MakeListings@empress $ZN.lc $ZCN.ad //loading chart (for Mike) & Add/delete list@MakeListings@empress 6/p $ZN.wl //wire list - Mike needs copies of the first fiew pagesDocumentation DistributionThe last operations in BuildBackupTemplate.cm file print copies of the drawings, prescan, wirelist,and prescan files. They should be distributed as follows:Drawings, prescan, and wirelist to the Board Specific Binder2-sided copies of drawings and prescan to each of the two Schematics BindersLoading chart, first few pages of the wire list (which contains a location sorted list forchecking), and a copy of the sil layout drawing to Mike's Board Stuffing Binder. frGx`q-x_x\xYxX_xW9RxTw%xS_xQRxNMxMAxJ!xIoYxF,xEL)xC*xA)Kx?Gx>gRx=X 6iu 2r?$ 1,:x-<x*HLx&Bx% P "A EBuild Standards7Dorado-User.cm[Dorado-User.cm]Last modified September 4, 1979 3:43 PM by Taft[EXECUTIVE]eventRFC: FTP/K; Quit[SIL]0: Helvetica101: Helvetica72: Template643: Gates329: Dorado.lb9Y: 712A: DoradoDict.Analyze[BRAVO]N.INIT:"{6,1,0,0}g'@1{@@G[@1]@@E"H.INIT:"{6,1,0,0}g'@1{@@G[@1]{6,2,0,0}h{6,2,0,0}q@@E"FONT:0 Helvetica 10 Helvetica 10FONT:1 Helvetica 8 Helvetica 7FONT:2 Logo 24 Helvetica 10FONT:5 Helvetica 12 Helvetica 10FONT:6 Helvetica 10 Helvetica 10TABS: Standard tab width = 1792MARGINS: paragraph margin = 2998,Left margin = 2998, right margin = 20598UPDOWN: Delta left = 1792, Delta right = 0, Delta paragraph = 0LEAD: Line leading = 6, Paragraph leading = 12SCREEN: Screen top = 25, System window end = 90, Screen bottom = 780OFFSET: Standard offset = 4[HARDCOPY]PREFERREDFORMAT: PressPRESS: CloverPRINTEDBY: "$"[CHAT]BORDER: BLACKBELL: FLASH frG%bu ^r \0 YK W S R PT N L J I( G] C @1! <' : 9 5o 3 1 0 .C * (I '? %L. #D !  U   ) ^  ` : XBuild Standards8DoradoDisk.cm// DoradoDisk.cm// Last modified September 17, 1979 6:28 PM by TaftFTP Maxc Directory/c Alto Retrieve/c ^ Sys.errors CallFtp.run InstallSwat.run Chat.run Type.run ^ Empress.Run Bravo.run Bravo.error Bravo.messages ^ Directory/c Fonts Retrieve/c Fonts.Widths ^ Directory/c AltoFonts Retrieve/c Helvetica10.al Helvetica7.al ^ Gates32.al Template64.alCopy Ftp.run _ CallFtp.run //4 page stripped down version of Ftp.runInstallSwatCopy SysFont.al _ Helvetica10.al //use Helvetica so that .wl files print OKBootFrom sys.boot //boot here to fix file pointers and SysFont.al core allocationdelete installswat.run Dumper.Boot DMT.boot CallFtp.rundelete *Disk.cm//You should now load files from [IVY]DoradoFiles.dm and then run Sil/i. frG&;bu ^r \5 YK& W> U6 S- RA PT LE J I(L G]R E8 A >fU +RBuild Standards9DoradoDict.Analyze; This is a custom dictionary for the Dorado; Last edited by R. Bates July 23, 1979get = ECLDict.AnalyzeTEMP=LM3911+20K/16/J;Temperature sensor - LM3911 plus 20K in pin 6SPARE=SpareSocket/16/J;Empty chip locations for multiwireN128=SN74128/14/N;Should go away when released in TtlDict.analyzeMC107=MC10107/16/E;adds pin 6 for MemC - LampsonMC124=MC10124/16/ETC; standard MC124 with extra sections for drawingsMC125=MC10125/16/ETC; standard MC125 with extra sections for drawingsMosRam=MosRam/16/J;section for drawing explicit pwr and GNDDS3679=DS3679/16/N;memory driver with series resistor and 2 disables8T98=8T98/16/N; Hex Ttl drivers with enables on 4 & 2 groupsMPQ3303=MPQ3303/14/J; quad transistors for BaseBoardMPQ6002=MPQ6002/14/J; quad transistors for BaseBoardCD4051=CD4051/16/T;8 input analoge switch for BaseBoardMC12040=MC12040/14/E; Phase Frequence Detector for BaseBoardCOMP=AUGATCG16/16/J; Another macro def for descrete components8RP-27=B898-3-R27/16/J; Beckman Resistor pack - 8 27 ohm resistorsMC318=MC10318/16/J; Something for Ken!@TEMPa,P1,1 > a,P2,2 > a,P3,3 > a,P4,4 > a,P5,5 > a,P6,6 > a,P7,7 > a,P8,8 > a,P9,9a,P10,10 > a,P11,11 > a,P12,12 > a,P13,13 > a,P14,14 > a,P15,15 > a,P16,16b,IN,1 > c,IN,2 > d,IN,3 > e,IN,4 > f,IN,5 > g,IN,6 > h,IN,7 > i,IN,8j,IN,9 > k,IN,10 > l,IN,11 > m,IN,12 > n,IN,13 > o,IN,14 > p,IN,15 > q,IN,16@COMP, 8RP-27a,P1,1 > a,P2,2 > a,P3,3 > a,P4,4 > a,P5,5 > a,P6,6 > a,P7,7 > a,P8,8 > a,P9,9a,P10,10 > a,P11,11 > a,P12,12 > a,P13,13 > a,P14,14 > a,P15,15 > a,P16,16b,--,1 > b,-,16 ;the "--" is hidden under the left of 4 & 5 and bottom of 6c,--,2 > c,-,15 ;the "-" is hidden under the right of 4 & 5 and top of 6d,--,3 > d,-,14e,--,4 > e,-,13f,--,5 > f,-,12g,--,6 > g,-,11h,--,7 > h,-,10i,--,8 > i,-,9j,--,9 > j,-,8k,--,10 > k,-,7l,--,11 > l,-,6m,--,12 > m,-,5n,--,13 > n,-,4o,--,14 > o,-,3p,--,15 > p,-,2q,--,16 > q,-,1 frG$bu ^r, \' [ YK'- W'" U'/ S' R'' PT'' N'( L'1 J') I(' G]' E'$ C'! A'" @1'# >f  : 9 7:N 5oJ 3E 1L .C ,x *N (J 'M %LJ # !    U    ) ^    2 ?[]Build Standards10@SPAREa,P1,1 > a,P8,8 > a,P16,16@N128a,IN,2,3 >a,OUT,1 >b,IN,5,6 >b,OUT,4 >c,IN,8,9 >c,OUT,10 >d,IN,11,12 >d,OUT,13@MC107a,IN,4,5 > a,OUT,2 > a,o,3b,IN,7,9 > b,OUT,11 > b,o,10c,IN,14,15 > c,OUT,12 > c,o,13d,IN,6@MC124a,IN,5 > a,c,6 > a,OUT,4 > a,o,2 > a,x,9b,IN,7 > b,OUT,3 > b,o,1c,IN,10 > c,OUT,12 > c,o,15d,IN,11 > d,OUT,13 > d,o,14e,IN,5 > e,OUT,4 > e,o,2f,IN,6@MC125a,IN,3 > a,c,2 > a,OUT,4 > a,v,1 > a,x,9b,IN,7 > b,c,6 > b,OUT,5c,IN,11 > c,c,10 > c,OUT,12d,IN,15 > d,c,14 > d,OUT,13e,IN,3 > e,c,2 > e,OUT,4f,IN,1@MosRama,A0,1> a,A1,9> a,A2,5> a,A3,7> a,A4,6> a,A5,12> a,A6,11> a,A7,10a,A8,13> a,RAS',4> a,CAS',15> a,WE',3> a,V+,8> a,GRND,16b,IN,2 > b,OUT,14c,A0,1> c,A1,9> c,A2,5> c,A3,7> c,A4,6> c,A5,12> c,A6,11> c,A7,10c,A8,13> c,RAS',4> c,CAS',15> c,WE',3> c,V+,8> c,GRND,16@DS3679a,IN,2 > a,OUT,3b,IN,4 > b,OUT,5c,IN,6 > c,OUT,7d,IN,10 > d,OUT,9e,IN,12 > e,OUT,11f,IN,14 > f,OUT,13 frG b ^ \ Y' W\ UN Q P0 Ne L J I En C A( @  >B a,OUT,3 >b,IN,4 >b,OUT,5 >c,IN,6 >c,OUT,7 >d,IN,10 >d,OUT,9e,IN,12 >e,OUT,11 >f,IN,14 >f,OUT,13 >g,En4',1 >g,En2',15@MPQ3303, MPQ6002a,IN,2 > a,OUT,1 > a,e,3b,IN,6 > b,OUT,7 > b,e,5c,IN,9 > c,OUT,8 > c,e,10d,IN,13 > d,OUT,14 > d,e,12@CD4051a,A,11 > a,B,10 > a,C,9a,Ch7,4 > a,Ch6,2 > a,Ch5,5 > a,Ch4,1 > a,Ch3,12 > a,Ch2,15 > a,Ch1,14 > a,Ch0,13a,INH,6 > a,V-,7a,OUT,3@MC12040a,R,6 > a,V,9a,U,4 > a,U',3 > a,D,12 > a,D',11@MC318a,D0,8 > a,D1,7 > a,D2,6 > a,D3,5 > a,D4,4 > a,D5,3 > a,D6,2 > a,D7,1 >a,Comp,11 > a,Ref+,12 > a,Ref-,10a,Out+,14 > a,Out-,15a,V-,9 > a,GRND,16 frG b ^ \ ZC Y'9 U S Q P0 Ne L I G9 En CQ A @