Page Numbers: Yes First Page: 1
Columns: 2 Edge Margin: .8" Between Columns: .0"
Heading:
DMem-Rev-F.ps
COMPONENTS:
10SIP: 2
64KRAM: 3 4 5 6 7 8
91011121314
15
ALS538: 2
CAP: 116
DLY: 1
LED: 7
LS14: 117
LS375: 2
N393: 2
PLAT16: 2
PLAT18: 1
RES: 1 717
S00: 1 2
S02: 1 717
S04: 1 217
S10: 1 2
S138: 2
S20: 1
S240: 2
S244: 2 3 4 5 6
S280: 7
S32: 1 217
S373: 3 4 5 6
S38: 1
S64: 1
S74: 1 717
S85: 2
Spare20: 17
SW4: 2
SIGNAL NAMES:
+: 1(1) 2(1) 3(1) 4(1) 5(1) 6(1)
7(1) 8(1) 9(1)10(1)11(1)12(1)
13(1)14(1)15(1)16(1)17(1)18(1)
A14: 2(2)
A15: 2(2)
A16: 2(2)
A17: 2(2)
Ack’: 1(2)
AckWrite’: 1(2)
Ad.0a: 2(1) 7(2) 8(16) 9(16)
Ad.0b: 2(1) 7(2)10(16)11(16)
Ad.0c: 2(1) 7(2)12(16)13(16)
Ad.0d: 2(1) 7(2)14(16)15(16)
Ad.1a: 2(1) 7(2) 8(16) 9(16)
Ad.1b: 2(1) 7(2)10(16)11(16)
Ad.1c: 2(1) 7(2)12(16)13(16)
Ad.1d: 2(1) 7(2)14(16)15(16)
Ad.2a: 2(1) 7(2) 8(16) 9(16)
Ad.2b: 2(1) 7(2)10(16)11(16)
Ad.2c: 2(1) 7(2)12(16)13(16)
Ad.2d: 2(1) 7(2)14(16)15(16)
Ad.3a: 2(1) 7(2) 8(16) 9(16)
Ad.3b: 2(1) 7(2)10(16)11(16)
Ad.3c: 2(1) 7(2)12(16)13(16)
Ad.3d: 2(1) 7(2)14(16)15(16)
Ad.4a: 2(1) 7(2) 8(16) 9(16)
Ad.4b: 2(1) 7(2)10(16)11(16)
Ad.4c: 2(1) 7(2)12(16)13(16)
Ad.4d: 2(1) 7(2)14(16)15(16)
Ad.5a: 2(1) 7(2) 8(16) 9(16)
Ad.5b: 2(1) 7(2)10(16)11(16)
Ad.5c: 2(1) 7(2)12(16)13(16)
Ad.5d: 2(1) 7(2)14(16)15(16)
Ad.6a: 2(1) 7(2) 8(16) 9(16)
Ad.6b: 2(1) 7(2)10(16)11(16)
Ad.6c: 2(1) 7(2)12(16)13(16)
Ad.6d: 2(1) 7(2)14(16)15(16)
Ad.7a: 2(1) 7(2) 8(16) 9(16)
Ad.7b: 2(1) 7(2)10(16)11(16)
Ad.7c: 2(1) 7(2)12(16)13(16)
Ad.7d: 2(1) 7(2)14(16)15(16)
AD10/: 2(1)18(1)
AD11: 2(3)
AD11/: 2(1)18(1)
AD12: 2(3)
AD12/: 2(1)18(1)
AD13: 2(3)
AD13/: 2(1)18(1)
AD14/: 2(2)18(1)
AD15/: 2(2)18(1)
AD16/: 2(2)18(1)
AD17/: 2(2)18(1)
ADR1/: 2(1)18(1)
ADR2/: 2(1)18(1)
ADR3/: 2(1)18(1)
ADR4/: 2(1)18(1)
ADR5/: 2(1)18(1)
ADR6/: 2(1)18(1)
ADR7/: 2(1)18(1)
ADR8/: 2(1)18(1)
ADR9/: 2(1)18(1)
ADRA/: 2(1)18(1)
ADRB/: 2(1)18(1)
ADRC/: 2(1)18(1)
ADRD/: 2(1)18(1)
ADRE/: 2(1)18(1)
ADRF/: 2(1)18(1)
BdSel: 1(2) 2(1)
Busy: 1(2) 2(2)
Busy’: 1(3) 2(1)
CAS: 2(1) 3(1) 5(1)
CAS’: 1(1) 2(2) 7(1)
CAS0’: 2(1) 7(1) 8(16)
CAS1’: 2(1) 7(1) 9(16)
CAS2’: 2(1) 7(1)10(16)
CAS3’: 2(1) 7(1)11(16)
CAS4’: 2(1) 7(1)12(16)
CAS5’: 2(1) 7(1)13(16)
CAS6’: 2(1) 7(1)14(16)
CAS7’: 2(1) 7(1)15(16)
DAT0/: 3(2)18(1)
DAT1/: 3(2)18(1)
DAT2/: 3(2)18(1)
DAT3/: 3(2)18(1)
DAT4/: 4(2)18(1)
DAT5/: 4(2)18(1)
DAT6/: 4(2)18(1)
DAT7/: 4(2)18(1)
DAT8/: 5(2)18(1)
DAT9/: 5(2)18(1)
DATA/: 5(2)18(1)
Data0’: 3(1) 7(1)
Data1’: 3(1) 7(1)
Data2’: 3(1) 7(1)
Data3’: 3(1) 7(1)
Data4’: 4(1) 7(1)
Data5’: 4(1) 7(1)
Data6’: 4(1) 7(1)
Data7’: 4(1) 7(1)
Data8’: 5(1) 7(1)
Data9’: 5(1) 7(1)
DataA’: 5(1) 7(1)
DataB’: 5(1) 7(1)
DataC’: 6(1) 7(1)
DataD’: 6(1) 7(1)
DataE’: 6(1) 7(1)
DataF’: 6(1) 7(1)
DATB/: 5(2)18(1)
DATC/: 6(2)18(1)
DATD/: 6(2)18(1)
DATE/: 6(2)18(1)
DATF/: 6(2)18(1)
DoneA’: 1(3)
DoneB: 1(2)
DoneB’: 1(2)
Error’: 1(1) 7(1)
Gnd: 1(1) 2(1) 3(1) 4(1) 5(1) 6(1)
7(1) 8(1) 9(1)10(1)11(1)12(1)
13(1)14(1)15(1)16(1)17(1)18(1)
GND: 18(8)
Init: 1(1)17(1)
Init’: 1(2) 2(1) 7(1)17(1)
INIT/: 17(1)18(1)
Mem: 1(2)
Mem’: 1(2)
MemCycle: 1(1) 2(4)
MemReq: 1(4)
MRDC/: 1(2) 7(1)18(1)
MWTC/: 1(2)18(1)
PU: 1(2) 2(2)17(1)
RAS’: 2(3)
RAS0’: 2(1) 7(1) 8(16)
RAS1’: 2(1) 7(1) 9(16)
RAS2’: 2(1) 7(1)10(16)
RAS3’: 2(1) 7(1)11(16)
RAS4’: 2(1) 7(1)12(16)
RAS5’: 2(1) 7(1)13(16)
RAS6’: 2(1) 7(1)14(16)
RAS7’: 2(1) 7(1)15(16)
ReadMB’: 1(1) 2(1) 3(1) 4(1) 5(1) 6(1)
Ref: 1(2)
Ref’: 1(2)
RefCycle: 1(3) 2(2)
RefRAS’: 2(2)
RefReq: 1(2)
StartCAS’: 1(1) 2(1)
StartRAS’: 1(1) 2(1)
SwAddr’: 1(1) 2(2)
VCC: 1(3) 2(1) 7(10) 8(16) 9(16)10(16)
11(16)12(16)13(16)14(16)15(16)16(2)
17(2)18(8)
WE0’: 2(1) 7(1) 8(16)
WE1’: 2(1) 7(1) 9(16)
WE2’: 2(1) 7(1)10(16)
WE3’: 2(1) 7(1)11(16)
WE4’: 2(1) 7(1)12(16)
WE5’: 2(1) 7(1)13(16)
WE6’: 2(1) 7(1)14(16)
WE7’: 2(1) 7(1)15(16)
WriteMB’: 1(1) 3(1) 5(1)
XACK/: 1(2)18(1)