~
BEGIN
outf: IO.STREAM;
lineCount : CARD;
Variables for the Oracle File
nr:INT = 1; --number of colums in the right side of the line
nl:INT = 4; --number of colums in the left side of the line
NbRight : TYPE = [0..nr);
NbLeft : TYPE = [0..nl);
RightLine: TYPE = ARRAY NbRight OF Rope.ROPE;
LeftLine: TYPE = ARRAY NbLeft OF Rope.ROPE;
rl: RightLine;
ll: LeftLine;
comment: Rope.ROPE;
Special variables of the PC-Bus
Signal : TYPE = {T,F,X};
MDSerialIn,MDExecute,MDAddress : Signal;
MDShiftCK,MnDFreeze,MnDReset : Signal;
MDSerialOut: Signal;
IOWPC,IORPC,nIOWPC,nIORPC: Signal;
Address, DataIn, DataOut, dregister : INT; --negative Data & Address means X
Init:
PROC []
RETURNS [] ~ {
MDSerialIn ← X;
MDExecute ← X;
MDAddress ← X;
MDShiftCK ← X;
MnDFreeze ← T;
MnDReset ← T;
Address ← 0;
DataIn ← -1; --negative INT means X
DataOut ← -1;
IOWPC ← F;
IORPC ← F;
MDSerialOut ← F;
};
RopeFromSignal:
PROC [s: Signal]
RETURNS [r: Rope.
ROPE] ~ {
Convert a signal {F,T,X} into the corresponding Rope {0,1,X}
SELECT s
FROM
F => r ← "0";
T => r ← "1";
ENDCASE => r ← "X";
};
Inv:
PROC [s: Signal]
RETURNS [t: Signal] ~ {
t gets the invert of s
SELECT s
FROM
F => t ← T;
T => t ← F;
ENDCASE => t ← X;
};
Send:
PROC []
RETURNS [] ~ {
This Proc convert the variables into ropes rl[i] & ll[i] for generating the line
then call MergeOut for writing the line
Verification :
Send :
nIOWPC ← Inv[IOWPC];
nIORPC ← Inv[IORPC];
IF Address >= 0 THEN ll[0] ← OracleGen.LExtend[OracleGen.Hex[Address],5]
ELSE ll[0] ← "XXXXX";
IF DataOut >= 0 THEN ll[1] ← OracleGen.LExtend[OracleGen.Hex[DataOut],2]
ELSE ll[1] ← "XX";
ll[1] ← Rope.Concat["XX",ll[1]];
ll[2] ← RopeFromSignal[nIOWPC];
ll[3] ← RopeFromSignal[nIORPC];
IF DataIn >= 0 THEN rl[0] ← OracleGen.LExtend[OracleGen.Hex[DataIn],2]
ELSE rl[0] ← "XX";
rl[0] ← Rope.Concat["XX",rl[0]];
MergeOut;
lineCount ← lineCount+ 1;
};
MergeOut:
PROC []
RETURNS [] ~ {
This proc merge into two Rope Right and Left different elements of the line
and write the result in the output stream
column : INT;
r : Rope.ROPE;
r ← " ";
FOR column
IN [0..nl)
DO r ← Rope.Cat[r,ll[column]," "];
ENDLOOP;
r ← Rope.Cat[r," | "];
FOR column
IN [0..nr)
DO r ← Rope.Cat[r,rl[column]," "];
ENDLOOP;
outf.PutF["%g -- %g %g \n",IO.rope[r],IO.rope[Convert.RopeFromInt[lineCount]],IO.rope[comment]];
comment ← ""
};
Write:
PROC [adrs :
INT,da :
INT]
RETURNS [] ~ {
Address ← adrs;
DataOut ← da;
Send;
IOWPC ← T;
Send;
IOWPC ← F;
Send;
comment ← " Write Data out";
DataOut ← -1;
Send;
};
ReadAndCheck:
PROC [adrs :
INT,da :
INT]
RETURNS [] ~ {
Address ← adrs;
Send;
IORPC ← T;
Send;
comment ← " ReadAndCheck Data";
DataIn ← da;
Send;
IORPC ← F;
DataIn ← -1;
Send;
};
AssembleDbus:
PROC []
RETURNS [da:
INT] ~ {
IF (MnDReset=T) THEN da ← 32 ELSE da ← 0;
IF (MnDFreeze=T) THEN da ← da + 16;
IF (MDExecute=T) THEN da ← da + 8;
IF (MDSerialIn=T) THEN da ← da + 4;
IF (MDAddress=T) THEN da ← da + 2;
IF (MDShiftCK=T) THEN da ← da + 1;
dregister ← da;
};
DBusWrite:
PROC []
RETURNS [] ~ {
Write[600FH,AssembleDbus[]]; -- Address of the DBus Register is "600FH"
};
DBusCheck:
PROC []
RETURNS [] ~ {
r : INT;
IF (MDSerialOut=T) THEN r ← dregister+128 ELSE r ← dregister;
ReadAndCheck[600FH,r];
};
SendDBusAddress:
PROC [address:
CARDINAL]
RETURNS [] ~ {
This Proc send an address on the DebugBus
adrs: CARDINAL ← address;
s: INT;
MDAddress ← T;
FOR s
IN [0..16)
DO
MDShiftCK ← F;
IF (BitOps.WShift[adrs,s-15] MOD 2) = 0 THEN MDSerialIn ← F
ELSE MDSerialIn ← T;
DBusWrite;
MDShiftCK ← T;
DBusWrite;
ENDLOOP;
MDAddress ← F;
MDShiftCK ← F;
DBusWrite;
};
ReadDBusAndCheck:
PROC [v:
CARD, c:
INT ← 16]
RETURNS [] ~ {
Reading of a path with c transitions of ShiftCK
s: INT;
value: CARD ← v;
MDAddress ← F;
MDShiftCK ← F;
IF (BitOps.WShift[value,1-c] MOD 2) = 0 THEN MDSerialOut ← F
ELSE MDSerialOut ← T;
DBusWrite;
DBusCheck;
FOR s
IN [1..c)
DO
MDShiftCK ← T;
IF (BitOps.WShift[value,s-c+1] MOD 2) = 0 THEN MDSerialOut ← F
ELSE MDSerialOut ← T;
DBusWrite;
DBusCheck;
MDShiftCK ← F;
DBusWrite;
ENDLOOP;
};
Start of the Program
Here the program start :
Create or Append the file
outf ← FS.StreamOpen["///Chip/IOBDBus1.oracle", $create];
outf.PutF["-- Test D-Bus by PC interface\n"];
outf.PutF[" \n"];
outf.PutF["-- Output :\n"];
outf.PutF["-- Address: A, DataOut: B, nIOWPC: C, nIORPC: D \n"];
outf.PutF["-- Input :\n"];
outf.PutF["-- DataIn :M \n"];
outf.PutF[" \n"];
outf.PutF["-- A B C D ~ M \n"];
outf.PutF["\n"];
Start Generation :
lineCount← 0;
Init;
Send;
Address in the DBus is :
<BoardNum:4><HybridNum:4><InterfaceNum:3><ChipNum:2><PathNum:3>
<ChipNum>=0 is for BIC
The structure of the Identificator is "0101 cccc ccrr rrrr"
cccccc is the Type, rrrrrr is the Version
comment ← "Address of the Display ID path";
SendDBusAddress[0008H]; -- "0000 0000 000 01 000"
comment ← "ID of Display : type 8, version 1";
ReadDBusAndCheck[5201H]; -- "0101 001000 000001"
comment ← "Address of the Map-Cache ID path";
SendDBusAddress[0028H]; -- "0000 0000 001 01 000"
comment ← "ID of Map-Cache : type 9, version 1";
ReadDBusAndCheck[5241H]; -- "0101 001001 000001"
comment ← "Address of the Cache ID path";
SendDBusAddress[0048H]; -- "0000 0000 010 01 000"
comment ← "ID of Cache : type 5, version 1";
ReadDBusAndCheck[5141H]; -- "0101 000101 000001"
comment ← "Address of the IOB ID path";
SendDBusAddress[0068H]; -- "0000 0000 011 01 000"
comment ← "ID of IOB : type 7, version 1";
ReadDBusAndCheck[51C1H]; -- "0101 000111 000001"
comment ← "Address of the BIC 0 ID path";
SendDBusAddress[0000H];
comment ← "ID of BIC type 2, Version 0";
ReadDBusAndCheck[5080H];
comment ← "Address of the BIC 1 ID path";
SendDBusAddress[0020H];
comment ← "ID of BIC type 2, Version 1";
ReadDBusAndCheck[5081H];
comment ← "Address of the BIC 2 ID path";
SendDBusAddress[0040H];
comment ← "ID of BIC type 2, Version 2";
ReadDBusAndCheck[5082H];
comment ← "Address of the BIC 3 ID path";
SendDBusAddress[0060H];
comment ← "ID of BIC type 2, Version 3";
ReadDBusAndCheck[5083H];
outf.PutF[". \n"]; -- end
outf.Close[];