DIRECTORY Core, CoreFlat, CoreProperties, Logic, Ports, Rosemary, Sisyph, SmallCacheLogic; SmallCachePrechImpl: CEDAR PROGRAM IMPORTS CoreFlat, CoreProperties, Logic, Ports, Rosemary, Sisyph EXPORTS SmallCacheLogic ~ BEGIN OPEN SmallCacheLogic; transistor: PUBLIC CoreFlat.CutSet _ CoreFlat.CreateCutSet[labels: LIST ["Prech"]]; Prech: PUBLIC PROC [cx: Context, ds: Ports.Drive] RETURNS [ct: CellType] ~ { ct _ Sisyph.ES["Prech.sch", cx]; [] _ CoreFlat.CellTypeCutLabels[Rosemary.BindCellType[ct, "Prech"], "Prech", Logic.logicCutSet]; CoreProperties.PutCellTypeProp[ct, $DriveStrength, NEW[Ports.Drive _ ds]]; Ports.InitPorts[ct, l, none, "In", "Prech", "Vdd", "Gnd"]; Ports.InitPorts[ct, l, drive, "nX"]; }; PrechRef: TYPE ~ REF PrechRep; PrechRep: TYPE ~ RECORD [in, nx, prech: NAT _ LAST [NAT], ds: Ports.Drive _ none]; PrechInit: Rosemary.InitProc ~ { state: PrechRef _ IF oldStateAny=NIL THEN NEW[PrechRep] ELSE NARROW[oldStateAny]; ds: Ports.Drive _ NARROW[CoreProperties.GetCellTypeProp[cellType, $DriveStrength], REF Ports.Drive]^; [state.in, state.nx, state.prech] _ Ports.PortIndexes[cellType.public, "In", "nX", "Prech"]; state.ds _ ds; stateAny _ state }; PrechSimple: Rosemary.EvalProc ~ { state: PrechRef _ NARROW[stateAny]; SELECT p[state.prech].l FROM L => p[state.in].d _ none; -- normal state H => {p[state.in].l _ H; p[state.in].d _ state.ds}; -- drive an H on the INPUT X => {p[state.in].l _ X; p[state.in].d _ state.ds}; -- drive an X on the INPUT ENDCASE => ERROR; p[state.nx].l _ Ports.NotL[p[state.in].l]; -- always }; [] _ Rosemary.Register["Prech", PrechInit, PrechSimple]; END. @SmallCachePrechImpl.mesa Copyright Σ 1987 by Xerox Corporation. All rights reserved. Jean-Marc Frailong, May 9, 1988 Pradeep Sindhu May 11, 1988 0:18:46 am PDT Eval proc for special 2.5V precharge cell so that Rosemary won't loop until the end of times... Prech Return the cell with the right eval proc set Κβ˜code•Mark outsideHeaderšœ™Kšœ<™