Create:
PROC
RETURNS [ct: CellType] = {
fsa: StateMachine;
StartA: Wire ← CoreOps.CreateWire[name: "StartA"];
Refresh: Wire ← CoreOps.CreateWire[name: "Refresh"];
SelWriteData0: Wire ← CoreOps.CreateWire[name: "SelWriteData0"];
SelWriteData1: Wire ← CoreOps.CreateWire[name: "SelWriteData1"];
RamBufWrAdd0: Wire ← CoreOps.CreateWire[name: "RamBufWrAdd0"];
RamBufWrAdd1: Wire ← CoreOps.CreateWire[name: "RamBufWrAdd1"];
RamBufWrite : Wire ← CoreOps.CreateWire[name: "RamBufWrite"];
SelColumnAdd: Wire ← CoreOps.CreateWire[name: "SelColumnAdd"];
nRAS: Wire ← CoreOps.CreateWire[name: "nRAS"];
nCAS: Wire ← CoreOps.CreateWire[name: "nCAS"];
public: Wire ← WireList[
LIST["Vdd", "Gnd", "Clock", "Reset",
StartA, Refresh, SelWriteData0, SelWriteData1, RamBufWrAdd0, RamBufWrAdd1, RamBufWrite, SelColumnAdd, nRAS, nCAS]];
states: LIST OF ATOM ← LIST[$Idle];
states ← StateSeq[states, "Access", 10];
states ← StateSeq[states, "Refresh", 2];
fsa ← NewMachine[states];
Mealy[fsa, $Idle,
LIST[nRAS, nCAS],
LIST [
[$Idle, Not[StartA]],
[$Access0, And[StartA, Not[Refresh]]],
[$Refresh0, And[StartA, Refresh]]
]];
Mealy[fsa, $Access0, LIST[nCAS], LIST [[$Access1, true]]];
Mealy[fsa, $Access1, LIST[nCAS, SelColumnAdd], LIST [[$Access2, true]]];
Mealy[fsa, $Access2, LIST[SelColumnAdd, RamBufWrite], LIST [[$Access3, true]]];
Mealy[fsa, $Access3, LIST[nCAS], LIST [[$Access4, true]]];
Mealy[fsa, $Access4, LIST[SelWriteData1, RamBufWrAdd1, RamBufWrite], LIST [[$Access5, true]]];
Mealy[fsa, $Access5, LIST[nCAS, SelWriteData1, RamBufWrAdd1], LIST [[$Access6, true]]];
Mealy[fsa, $Access6, LIST[SelWriteData0, RamBufWrAdd0, RamBufWrite], LIST [[$Access7, true]]];
Mealy[fsa, $Access7, LIST[nCAS, SelWriteData0, RamBufWrAdd0], LIST [[$Access8, true]]];
Mealy[fsa, $Access8, LIST[SelWriteData0, SelWriteData1, RamBufWrAdd0, RamBufWrAdd1, RamBufWrite], LIST [[$Access9, true]]];
Mealy[fsa, $Access9, LIST[nRAS, nCAS, SelWriteData0, SelWriteData1, RamBufWrAdd0, RamBufWrAdd1], LIST [[$Idle, true]]];
Mealy[fsa, $Refresh0, LIST[nRAS], LIST [[$Refresh1, true]]];
Mealy[fsa, $Refresh1, NIL, LIST [[$Idle, true]]];
fsa.initialState ← FindState[fsa, $Idle];
ct ← StateMachineCell[public, fsa];
};