DragonIOPTransactions.tioga
Copyright © 1986 by Xerox Corporation. All rights reserved.
Created By Neil Gunther, August 1, 1986 2:03:03 pm PDT
Last Edited by: Neil Gunther August 4, 1986 6:23:00 pm PDT
This document enumerates IO master induced bus transactions across both sides of the IOP chip.
Ethernet Controller: Intel 82586
24-bit addressing; low 16-bits muxed data; 8 MHz (120 nS) cycle time
Glossary
Assume an area in the main memory which contains the following:
System Control Block:   SysCtlBlk
Transmit Buffer Desciptor:  TxBuffDesc
Receive Buffer Desciptor:  RxBuffDesc
Other mnemonics:
Dragon Processor:       DP
I/O controller:        IOP
The Ethernet controller:      ENC
Logical Link Control:       LogLnkCtl
System Configuration Pointer:    SysConfigPtr
Initialization               
Read SysConfigPtr             All SloBus
To obtain address of Intermediate SysConfigPtr
Determine if SloBus is 8 or 16 bit data
Clear ISCP bit
Intermediate SysConfigPtr contains base address and offset of SysCtlBlk
A bit in the Intermediate SysConfigPtr indicates that the ENC is initializing
This bit gets cleared after the Intermediate SysConfigPtr is read
Signal IOP that ENC is ready
For the boot process the local RAM and EPROM are used
Assert INT line
Data Transmission
Setup Command Unit
DP plants LogLnkCtl data in Tx buffer       DynaBus
IOP writes CU-START to SysCtlBlk        DynaBus
IOP plants pointer to CommandList in SysCtlBlk   DynaBus
IOP issues Transmit command         SloBus
IOP sets up pointer to TxBuffDesc       DynaBus
IOP sets up pointer to next command block     DynaBus
IOP issues interrupt to EthCtlr *        SloBus
ChannelAttention asserted high >= 1 bus cycle
Latched internally on falling edge
Obtain LogLnkCtl data from IO memory
ENC completes any higher priority tasks      SloBus + DynaBus
ENC reads SysCtlBlk           SloBus + DynaBus
ENC begins execution of CommandList      SloBus + DynaBus
ENC eventually begins the Transmit operation    Ethernet port
Bind LogLnkCtl data into packet
ENC fetches first TxBuffDesc         SloBus + DynaBus
ENC performs DMA burst from Tx buffer to Tx FIFO  SloBus + DynaBus
Transmit packet to Ethernet port according to protocol
ENC monitors Ethernet port activity       Ethernet port
ENC empties Tx FIFO           Ethernet port
ENC fetches next TxBuffDesc         SloBus + DynaBus
ENC continues to fill Tx FIFO until no further data  SloBus + DynaBus
Reinforce collisions during transmission
                  Ethernet port
Reschedule transmissions after collisions
                  Ethernet port
Provide transmit statistics and error report
ENC issues status to SysCtlBlk         SloBus + DynaBus
Data Reception
Monitor Ethernet port activity
ENC Receive Unit activity          Ethernet port
Receive data from Ethernet port         Ethernet port
Check and unbind packet           Ethernet port
Place data into IO memory *
ENC places data into Rx FIFO until threshold
ENC requests SloBus           SloBus
ENC performs DMA byte ("octet") transfer       SloBus + DynaBus
ENC releases SloBus until FIFO threshold     SloBus
ENC issues interrupt to IOP          SloBus
INT set low
ENC posts "frame received" bit in SysCtlBlk     SloBus
INT asserted high
Provide receive statistics and error report
Network Management
Collision detect CSMA/CD activity on the DTE port   Ethernet port
Backoff algorithm if collision occurs        Ethernet port
Issue a jam if collision during transmission      Ethernet port
References
Microcommunications Handbook, intel 1986
p. 2-14 System Control Block Format
p. 2-54 * CPU/82586 Handshake
p. 5-16 Application Note Schematics
Hard Disk Controller: Am 9580
To be completed.
Serial Communcations Controller: Z8030
To be completed.
Boot/Debug Microprocessor
To be completed.