DIRECTORY
RoseTypes, IFUData2, RoseCreate, DragOpsCross, Dragon, BitOps, SwitchTypes, IFUPLA, NumTypes;

IFUData2Impl: CEDAR PROGRAM
IMPORTS RoseCreate, Dragon, BitOps, NumTypes
EXPORTS IFUData2

= BEGIN OPEN
RoseTypes, IFUData2;

LSourceLt: TYPE = IFUPLA.LSourceLt;
LSourceRt: TYPE = IFUPLA.LSourceRt;
SSourceLt: TYPE = IFUPLA.SSourceLt;
SSourceRt: TYPE = IFUPLA.SSourceRt;
ABCSourceLt: TYPE = IFUPLA.ABCSourceLt;
ABCSourceRt: TYPE = IFUPLA.ABCSourceRt;
PlusOffset: TYPE = IFUPLA.PlusOffset;
MinusOffset: TYPE = IFUPLA.MinusOffset;


RegisterCells: PROC =
BEGIN
LFormation _ RoseCreate.RegisterCellType[name: "LFormation",
expandProc: NIL,
ioCreator: CreateLFormationIO, driveCreator: CreateLFormationDrive, initializer: InitializeLFormation,
evals: [EvalSimple: LFormationEvalSimple],
tests: LIST[],
ports: CreateLFormationPorts[]
];
SDelta _ RoseCreate.RegisterCellType[name: "SDelta",
expandProc: NIL,
ioCreator: CreateSDeltaIO, driveCreator: CreateSDeltaDrive, 
evals: [EvalSimple: SDeltaEvalSimple],
tests: LIST[],
ports: CreateSDeltaPorts[]
];
SFormation _ RoseCreate.RegisterCellType[name: "SFormation",
expandProc: NIL,
ioCreator: CreateSFormationIO, driveCreator: CreateSFormationDrive, initializer: InitializeSFormation,
evals: [EvalSimple: SFormationEvalSimple],
tests: LIST[],
ports: CreateSFormationPorts[]
];
SLimitTest _ RoseCreate.RegisterCellType[name: "SLimitTest",
expandProc: NIL,
ioCreator: CreateSLimitTestIO, driveCreator: CreateSLimitTestDrive, initializer: InitializeSLimitTest,
evals: [EvalSimple: SLimitTestEvalSimple],
tests: LIST[],
ports: CreateSLimitTestPorts[]
];
AFormation _ RoseCreate.RegisterCellType[name: "AFormation",
expandProc: NIL,
ioCreator: CreateAFormationIO, driveCreator: CreateAFormationDrive, initializer: InitializeAFormation,
evals: [EvalSimple: AFormationEvalSimple],
tests: LIST[],
ports: CreateAFormationPorts[]
];
BFormation _ RoseCreate.RegisterCellType[name: "BFormation",
expandProc: NIL,
ioCreator: CreateBFormationIO, driveCreator: CreateBFormationDrive, initializer: InitializeBFormation,
evals: [EvalSimple: BFormationEvalSimple],
tests: LIST[],
ports: CreateBFormationPorts[]
];
CFormation _ RoseCreate.RegisterCellType[name: "CFormation",
expandProc: NIL,
ioCreator: CreateCFormationIO, driveCreator: CreateCFormationDrive, initializer: InitializeCFormation,
evals: [EvalSimple: CFormationEvalSimple],
tests: LIST[],
ports: CreateCFormationPorts[]
];
ABCFormation _ RoseCreate.RegisterCellType[name: "ABCFormation",
expandProc: ABCFormationExpand,
ioCreator: CreateABCFormationIO, driveCreator: CreateABCFormationDrive, 
evals: [],
tests: LIST[],
ports: CreateABCFormationPorts[]
];
END;
otherss: SymbolTable _ RoseCreate.GetOtherss["IFUData2.partsAssertions"];
LFormation: PUBLIC CellType;

CreateLFormationPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["IFUData2.LFormation.rosePorts"]};

LFormationSwitchIORef: TYPE = REF LFormationSwitchIORec;
LFormationSwitchIORec: TYPE = RECORD [
AlphaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,SAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,LStkTopB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,LAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,LPipe3BA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,LSourceLtBA: PACKED ARRAY [0 .. 4) OF SwitchTypes.SwitchVal
,LSourceRtBA: PACKED ARRAY [0 .. 4) OF SwitchTypes.SwitchVal
,PipeAdv1AB: SwitchTypes.SwitchVal
,PipeAdv2AB: SwitchTypes.SwitchVal
,PipeAdv3AB: SwitchTypes.SwitchVal
,PipeCCTrap3AB: SwitchTypes.SwitchVal
,PhA: SwitchTypes.SwitchVal
,PhB: SwitchTypes.SwitchVal
];

LFormationSimpleIORef: TYPE = REF LFormationSimpleIORec;
LFormationSimpleIORec: TYPE = RECORD [
fill0: [0 .. 255],
AlphaBA: [0..255]
,fill1: [0 .. 255],
SAB: [0..255]
,fill2: [0 .. 255],
LStkTopB: [0..255]
,fill3: [0 .. 255],
LAB: [0..255]
,fill4: [0 .. 255],
LPipe3BA: [0..255]
,fill5: [0 .. 4095],
LSourceLtBA: LSourceLt
,fill6: [0 .. 4095],
LSourceRtBA: LSourceRt
,fill7: [0 .. 32767],
PipeAdv1AB: BOOLEAN
,fill8: [0 .. 32767],
PipeAdv2AB: BOOLEAN
,fill9: [0 .. 32767],
PipeAdv3AB: BOOLEAN
,fill10: [0 .. 32767],
PipeCCTrap3AB: BOOLEAN
,fill11: [0 .. 32767],
PhA: BOOLEAN
,fill12: [0 .. 32767],
PhB: BOOLEAN
];

LFormationDriveRef: TYPE = REF LFormationDriveRec;
LFormationDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY LFormationPort OF DriveLevel];
LFormationPort: TYPE = {
AlphaBA, SAB, LStkTopB, LAB, LPipe3BA, LSourceLtBA, LSourceRtBA, PipeAdv1AB, PipeAdv2AB, PipeAdv3AB, PipeCCTrap3AB, PhA, PhB, LFormationPortTypePad13, LFormationPortTypePad14, LFormationPortTypePad15};

CreateLFormationIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
ioAsAny _ IF switch THEN NEW[LFormationSwitchIORec] ELSE NEW[LFormationSimpleIORec];
};

CreateLFormationDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
driveAsAny _ NEW[LFormationDriveRec];
};

LFormationStateRef: TYPE = REF LFormationStateRec;
LFormationStateRec: TYPE = RECORD [
lPipe: ARRAY [0..3] OF ARRAY Dragon.Phase OF Dragon.HexByte
];

InitializeLFormation: Initializer = {
state: LFormationStateRef _ NEW[LFormationStateRec];
cell.realCellStuff.state _ state;
};

LFormationEvalSimple: SimpleEval =
BEGIN
drive: LFormationDriveRef _ NARROW[cell.realCellStuff.newDriveAsAny];
sw: LFormationSwitchIORef _ NARROW[cell.realCellStuff.switchIO];
newIO: LFormationSimpleIORef _ NARROW[cell.realCellStuff.newIO];
state: LFormationStateRef _ NARROW[cell.realCellStuff.state];
BEGIN OPEN drive, newIO, state;
lBusLtB, lBusRtB: [0..256);
IF PhA THEN {
lPipe[1][a]	_ lPipe[0][b];
lPipe[2][a]	_ lPipe[1][b];
lPipe[3][a]	_ lPipe[2][b];
LAB			_ lPipe[1][a] };
IF PhB THEN {
IF PipeAdv1AB		THEN lPipe[1][b]	_ lPipe[1][a];
IF PipeAdv2AB		THEN lPipe[2][b]	_ lPipe[2][a];
IF PipeAdv3AB		THEN lPipe[3][b]	_ lPipe[3][a];
IF PipeCCTrap3AB	THEN lPipe[3][b]	_ lPipe[3][a];
LPipe3BA _ lPipe[3][b] };

IF PhB THEN lBusLtB _ SELECT LSourceLtBA FROM
l			=> lPipe[1][a],
s			=> SAB,
zero		=> 0,
l3			=> lPipe[3][b],
ENDCASE	=> ERROR;

IF PhB THEN lBusRtB _ SELECT LSourceRtBA FROM
zero		=> 0,
alpha		=> AlphaBA,
stack		=> LStkTopB,
one		=> 1,
ENDCASE	=> ERROR;

IF PhB THEN {
lPipe[0][b]	_ (lBusLtB + lBusRtB) MOD 128 };
END;
END;
SDelta: PUBLIC CellType;

CreateSDeltaPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["IFUData2.SDelta.rosePorts"]};

SDeltaSwitchIORef: TYPE = REF SDeltaSwitchIORec;
SDeltaSwitchIORec: TYPE = RECORD [
PopSa0BA: SwitchTypes.SwitchVal
,PopSb0BA: SwitchTypes.SwitchVal
,PushSc0BA: SwitchTypes.SwitchVal
,DeltaSBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
];

SDeltaSimpleIORef: TYPE = REF SDeltaSimpleIORec;
SDeltaSimpleIORec: TYPE = RECORD [
fill0: [0 .. 32767],
PopSa0BA: BOOLEAN
,fill1: [0 .. 32767],
PopSb0BA: BOOLEAN
,fill2: [0 .. 32767],
PushSc0BA: BOOLEAN
,fill3: [0 .. 255],
DeltaSBA: [0..255]
];

SDeltaDriveRef: TYPE = REF SDeltaDriveRec;
SDeltaDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY SDeltaPort OF DriveLevel];
SDeltaPort: TYPE = {
PopSa0BA, PopSb0BA, PushSc0BA, DeltaSBA};

CreateSDeltaIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
ioAsAny _ IF switch THEN NEW[SDeltaSwitchIORec] ELSE NEW[SDeltaSimpleIORec];
};

CreateSDeltaDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
driveAsAny _ NEW[SDeltaDriveRec];
};

SDeltaEvalSimple: SimpleEval =
BEGIN
drive: SDeltaDriveRef _ NARROW[cell.realCellStuff.newDriveAsAny];
sw: SDeltaSwitchIORef _ NARROW[cell.realCellStuff.switchIO];
newIO: SDeltaSimpleIORef _ NARROW[cell.realCellStuff.newIO];
BEGIN OPEN drive, newIO;
sum: INT;
sum		_ 0		+	(IF PushSc0BA	THEN 1 ELSE 0);
sum		_ sum	-	(IF PopSa0BA	THEN 1 ELSE 0);
sum		_ sum	-	(IF PopSb0BA	THEN 1 ELSE 0);
DeltaSBA	_ (sum	+ 256) MOD 256;
END;
END;
SFormation: PUBLIC CellType;

CreateSFormationPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["IFUData2.SFormation.rosePorts"]};

SFormationSwitchIORef: TYPE = REF SFormationSwitchIORec;
SFormationSwitchIORec: TYPE = RECORD [
AlphaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,LAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,SAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,DeltaSBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,SSourceLtBA: PACKED ARRAY [0 .. 4) OF SwitchTypes.SwitchVal
,SSourceRtBA: PACKED ARRAY [0 .. 4) OF SwitchTypes.SwitchVal
,PipeAdv1AB: SwitchTypes.SwitchVal
,PipeAdv2AB: SwitchTypes.SwitchVal
,PipeAdv3AB: SwitchTypes.SwitchVal
,PipeCCTrap3AB: SwitchTypes.SwitchVal
,PhA: SwitchTypes.SwitchVal
,PhB: SwitchTypes.SwitchVal
];

SFormationSimpleIORef: TYPE = REF SFormationSimpleIORec;
SFormationSimpleIORec: TYPE = RECORD [
fill0: [0 .. 255],
AlphaBA: [0..255]
,fill1: [0 .. 255],
LAB: [0..255]
,fill2: [0 .. 255],
SAB: [0..255]
,fill3: [0 .. 255],
DeltaSBA: [0..255]
,fill4: [0 .. 4095],
SSourceLtBA: SSourceLt
,fill5: [0 .. 4095],
SSourceRtBA: SSourceRt
,fill6: [0 .. 32767],
PipeAdv1AB: BOOLEAN
,fill7: [0 .. 32767],
PipeAdv2AB: BOOLEAN
,fill8: [0 .. 32767],
PipeAdv3AB: BOOLEAN
,fill9: [0 .. 32767],
PipeCCTrap3AB: BOOLEAN
,fill10: [0 .. 32767],
PhA: BOOLEAN
,fill11: [0 .. 32767],
PhB: BOOLEAN
];

SFormationDriveRef: TYPE = REF SFormationDriveRec;
SFormationDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY SFormationPort OF DriveLevel];
SFormationPort: TYPE = {
AlphaBA, LAB, SAB, DeltaSBA, SSourceLtBA, SSourceRtBA, PipeAdv1AB, PipeAdv2AB, PipeAdv3AB, PipeCCTrap3AB, PhA, PhB};

CreateSFormationIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
ioAsAny _ IF switch THEN NEW[SFormationSwitchIORec] ELSE NEW[SFormationSimpleIORec];
};

CreateSFormationDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
driveAsAny _ NEW[SFormationDriveRec];
};

SFormationStateRef: TYPE = REF SFormationStateRec;
SFormationStateRec: TYPE = RECORD [
sPipe: ARRAY [0..3] OF ARRAY Dragon.Phase OF Dragon.HexByte
];

InitializeSFormation: Initializer = {
state: SFormationStateRef _ NEW[SFormationStateRec];
cell.realCellStuff.state _ state;
};

SFormationEvalSimple: SimpleEval =
BEGIN
drive: SFormationDriveRef _ NARROW[cell.realCellStuff.newDriveAsAny];
sw: SFormationSwitchIORef _ NARROW[cell.realCellStuff.switchIO];
newIO: SFormationSimpleIORef _ NARROW[cell.realCellStuff.newIO];
state: SFormationStateRef _ NARROW[cell.realCellStuff.state];
BEGIN OPEN drive, newIO, state;
sBusLt, sBusRt:	Dragon.HexByte;

IF PhA THEN {
sPipe[1][a]	_ sPipe[0][b];
sPipe[2][a]	_ sPipe[1][b];
sPipe[3][a]	_ sPipe[2][b];
SAB			_ sPipe[1][a] };
IF PhB THEN {
IF PipeAdv1AB		THEN	sPipe[1][b]	_ sPipe[1][a];
IF PipeAdv2AB		THEN	sPipe[2][b]	_ sPipe[2][a];
IF PipeAdv3AB		THEN	sPipe[3][b]	_ sPipe[3][a];
IF PipeCCTrap3AB	THEN	sPipe[3][b]	_ sPipe[3][a] };
IF PhB THEN sBusLt _ SELECT SSourceLtBA FROM
s			=>	SAB,
l			=>	LAB,
zero		=>	0,
s3			=>	sPipe[3][b],
ENDCASE	=>	ERROR;
IF PhB THEN sBusRt _ SELECT SSourceRtBA FROM
deltaS		=>	DeltaSBA,
alpha		=>	AlphaBA,
zero		=>  0,
one		=>  1,
ENDCASE	=>	ERROR;
IF PhB THEN sPipe[0][b] _ (sBusLt+sBusRt+256) MOD 128;
END;
END;
SLimitTest: PUBLIC CellType;

CreateSLimitTestPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["IFUData2.SLimitTest.rosePorts"]};

SLimitTestSwitchIORef: TYPE = REF SLimitTestSwitchIORec;
SLimitTestSwitchIORec: TYPE = RECORD [
DPRejectedBA: SwitchTypes.SwitchVal
,XBus: PACKED ARRAY [0 .. 32) OF SwitchTypes.SwitchVal
,SAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,EStkOverFlowBA: SwitchTypes.SwitchVal
,PhA: SwitchTypes.SwitchVal
,PhB: SwitchTypes.SwitchVal
];

SLimitTestSimpleIORef: TYPE = REF SLimitTestSimpleIORec;
SLimitTestSimpleIORec: TYPE = RECORD [
fill0: [0 .. 32767],
DPRejectedBA: BOOLEAN
,XBus: ARRAY [0..2) OF CARDINAL
,fill2: [0 .. 255],
SAB: [0..255]
,fill3: [0 .. 32767],
EStkOverFlowBA: BOOLEAN
,fill4: [0 .. 32767],
PhA: BOOLEAN
,fill5: [0 .. 32767],
PhB: BOOLEAN
];

SLimitTestDriveRef: TYPE = REF SLimitTestDriveRec;
SLimitTestDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY SLimitTestPort OF DriveLevel];
SLimitTestPort: TYPE = {
DPRejectedBA, XBus, SAB, EStkOverFlowBA, PhA, PhB, SLimitTestPortTypePad6, SLimitTestPortTypePad7};

CreateSLimitTestIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
ioAsAny _ IF switch THEN NEW[SLimitTestSwitchIORec] ELSE NEW[SLimitTestSimpleIORec];
};

CreateSLimitTestDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
driveAsAny _ NEW[SLimitTestDriveRec];
};

SLimitTestStateRef: TYPE = REF SLimitTestStateRec;
SLimitTestStateRec: TYPE = RECORD [
sLimitAB: 	        	Dragon.HexByte,
sLimitFromXBusBA: 	BOOL,
sLimitToXBusBA:        BOOL
];

InitializeSLimitTest: Initializer = {
state: SLimitTestStateRef _ NEW[SLimitTestStateRec];
cell.realCellStuff.state _ state;
};

SLimitTestEvalSimple: SimpleEval =
BEGIN
drive: SLimitTestDriveRef _ NARROW[cell.realCellStuff.newDriveAsAny];
sw: SLimitTestSwitchIORef _ NARROW[cell.realCellStuff.switchIO];
newIO: SLimitTestSimpleIORef _ NARROW[cell.realCellStuff.newIO];
state: SLimitTestStateRef _ NARROW[cell.realCellStuff.state];
BEGIN OPEN drive, newIO, state;
drive[XBus] _ ignore;

IF PhA THEN {
Dragon.Assert[NOT(sLimitFromXBusBA AND sLimitToXBusBA), "We have a race here"];
IF sLimitFromXBusBA THEN sLimitAB	_ BitOps.ECFD[			XBus,	32, 24, 8];
IF sLimitToXBusBA THEN
     { drive[XBus] _ drive;
       XBus		_ BitOps.ICID[sLimitAB,  [0,0],	32, 24, 8] } };
IF PhB THEN {
sLimitFromXBusBA _  NOT DPRejectedBA AND
Dragon.BytetoPR[BitOps.ECFD[XBus, 32, 2*8, 8]] = ifuSLimit;
sLimitToXBusBA _  NOT DPRejectedBA AND
Dragon.BytetoPR[BitOps.ECFD[XBus, 32, 1*8, 8]] = ifuSLimit;
EStkOverFlowBA _ ((SAB+(255-sLimitAB --NOT sLimitAB-- )) MOD 128) IN [0..15) };
END;
END;
AFormation: PUBLIC CellType;

CreateAFormationPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["IFUData2.AFormation.rosePorts"]};

AFormationSwitchIORef: TYPE = REF AFormationSwitchIORec;
AFormationSwitchIORec: TYPE = RECORD [
XByte3: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,OpBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,AlphaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BetaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,LAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,SAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,ARegBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,ASourceLtBA: PACKED ARRAY [0 .. 6) OF SwitchTypes.SwitchVal
,ASourceRtBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,ASourceOffBA: PACKED ARRAY [0 .. 3) OF SwitchTypes.SwitchVal
,PipeAdv0AB: SwitchTypes.SwitchVal
,PipeAdv1AB: SwitchTypes.SwitchVal
,PipeKill1AB: SwitchTypes.SwitchVal
,PhA: SwitchTypes.SwitchVal
,PhB: SwitchTypes.SwitchVal
];

AFormationSimpleIORef: TYPE = REF AFormationSimpleIORec;
AFormationSimpleIORec: TYPE = RECORD [
fill0: [0 .. 255],
XByte3: [0..255]
,fill1: [0 .. 255],
OpBA: [0..255]
,fill2: [0 .. 255],
AlphaBA: [0..255]
,fill3: [0 .. 255],
BetaBA: [0..255]
,fill4: [0 .. 255],
LAB: [0..255]
,fill5: [0 .. 255],
SAB: [0..255]
,fill6: [0 .. 255],
ARegBA: [0..255]
,fill7: [0 .. 1023],
ASourceLtBA: ABCSourceLt
,fill8: [0 .. 255],
ASourceRtBA: ABCSourceRt
,fill9: [0 .. 8191],
ASourceOffBA: PlusOffset
,fill10: [0 .. 32767],
PipeAdv0AB: BOOLEAN
,fill11: [0 .. 32767],
PipeAdv1AB: BOOLEAN
,fill12: [0 .. 32767],
PipeKill1AB: BOOLEAN
,fill13: [0 .. 32767],
PhA: BOOLEAN
,fill14: [0 .. 32767],
PhB: BOOLEAN
];

AFormationDriveRef: TYPE = REF AFormationDriveRec;
AFormationDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY AFormationPort OF DriveLevel];
AFormationPort: TYPE = {
XByte3, OpBA, AlphaBA, BetaBA, LAB, SAB, ARegBA, ASourceLtBA, ASourceRtBA, ASourceOffBA, PipeAdv0AB, PipeAdv1AB, PipeKill1AB, PhA, PhB, AFormationPortTypePad15};

CreateAFormationIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
ioAsAny _ IF switch THEN NEW[AFormationSwitchIORec] ELSE NEW[AFormationSimpleIORec];
};

CreateAFormationDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
driveAsAny _ NEW[AFormationDriveRec];
};

AFormationStateRef: TYPE = REF AFormationStateRec;
AFormationStateRec: TYPE = RECORD [
aPipe: ARRAY [0..1] OF ARRAY Dragon.Phase OF Dragon.HexByte
];

InitializeAFormation: Initializer = {
state: AFormationStateRef _ NEW[AFormationStateRec];
cell.realCellStuff.state _ state;
};

AFormationEvalSimple: SimpleEval =
BEGIN
drive: AFormationDriveRef _ NARROW[cell.realCellStuff.newDriveAsAny];
sw: AFormationSwitchIORef _ NARROW[cell.realCellStuff.switchIO];
newIO: AFormationSimpleIORef _ NARROW[cell.realCellStuff.newIO];
state: AFormationStateRef _ NARROW[cell.realCellStuff.state];
BEGIN OPEN drive, newIO, state;


  drive[XByte3] _ IF PhB THEN drive ELSE ignore;

IF PhA THEN {
aPipe[1][a]	_ aPipe[0][b] };
IF PhB THEN {
aBusLt, aBusRt, sum:	Dragon.HexByte;
aBusLt _ SELECT ASourceLtBA FROM
cBase	=>	Dragon.PRtoByte[euConstant],
aBase	=>	Dragon.PRtoByte[euAux],
s		=>	SAB,
l		=>	LAB,
iRef	=>	Dragon.PRtoByte[ifuXBus]+4,
zero	=>	0,
ENDCASE =>	ERROR;
aBusRt _ SELECT ASourceRtBA FROM
alpha		=>	AlphaBA,
alpha03	=>	AlphaBA/16,
alpha47	=>	AlphaBA MOD 16,
op47		=>	OpBA MOD 16,
beta		=>	BetaBA,
beta03		=>	BetaBA/16,
beta47		=>	BetaBA MOD 16,
ENDCASE	=>	SELECT ASourceOffBA FROM
zero		=>  0,
one		=>  1,
two		=>  2,
three		=>  3,
minus4	=> 256-4,
minus3	=> 256-3,
minus2	=> 256-2,
minus1	=> 256-1,
ENDCASE	=> ERROR;
sum _ SELECT ASourceLtBA FROM
s, l		=> (aBusLt + aBusRt) MOD 128,
ENDCASE	=> (aBusLt + aBusRt) MOD 256;
IF PipeAdv0AB	THEN  ARegBA _  aPipe[0][b]	 _ sum;
IF PipeAdv1AB	THEN	              aPipe[1][b]	_ aPipe[1][a];
IF PipeKill1AB	THEN	              aPipe[1][b]	_ Dragon.PRtoByte[euConstant];
XByte3 _ LOOPHOLE[aPipe[1][b]] }
END;
END;
BFormation: PUBLIC CellType;

CreateBFormationPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["IFUData2.BFormation.rosePorts"]};

BFormationSwitchIORef: TYPE = REF BFormationSwitchIORec;
BFormationSwitchIORec: TYPE = RECORD [
XByte2: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,OpBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,AlphaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BetaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,LAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,SAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BRegBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BSourceLtBA: PACKED ARRAY [0 .. 6) OF SwitchTypes.SwitchVal
,BSourceRtBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BSourceOffBA: PACKED ARRAY [0 .. 3) OF SwitchTypes.SwitchVal
,PipeAdv0AB: SwitchTypes.SwitchVal
,PipeAdv1AB: SwitchTypes.SwitchVal
,PipeKill1AB: SwitchTypes.SwitchVal
,PhA: SwitchTypes.SwitchVal
,PhB: SwitchTypes.SwitchVal
];

BFormationSimpleIORef: TYPE = REF BFormationSimpleIORec;
BFormationSimpleIORec: TYPE = RECORD [
fill0: [0 .. 255],
XByte2: [0..255]
,fill1: [0 .. 255],
OpBA: [0..255]
,fill2: [0 .. 255],
AlphaBA: [0..255]
,fill3: [0 .. 255],
BetaBA: [0..255]
,fill4: [0 .. 255],
LAB: [0..255]
,fill5: [0 .. 255],
SAB: [0..255]
,fill6: [0 .. 255],
BRegBA: [0..255]
,fill7: [0 .. 1023],
BSourceLtBA: ABCSourceLt
,fill8: [0 .. 255],
BSourceRtBA: ABCSourceRt
,fill9: [0 .. 8191],
BSourceOffBA: PlusOffset
,fill10: [0 .. 32767],
PipeAdv0AB: BOOLEAN
,fill11: [0 .. 32767],
PipeAdv1AB: BOOLEAN
,fill12: [0 .. 32767],
PipeKill1AB: BOOLEAN
,fill13: [0 .. 32767],
PhA: BOOLEAN
,fill14: [0 .. 32767],
PhB: BOOLEAN
];

BFormationDriveRef: TYPE = REF BFormationDriveRec;
BFormationDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY BFormationPort OF DriveLevel];
BFormationPort: TYPE = {
XByte2, OpBA, AlphaBA, BetaBA, LAB, SAB, BRegBA, BSourceLtBA, BSourceRtBA, BSourceOffBA, PipeAdv0AB, PipeAdv1AB, PipeKill1AB, PhA, PhB, BFormationPortTypePad15};

CreateBFormationIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
ioAsAny _ IF switch THEN NEW[BFormationSwitchIORec] ELSE NEW[BFormationSimpleIORec];
};

CreateBFormationDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
driveAsAny _ NEW[BFormationDriveRec];
};

BFormationStateRef: TYPE = REF BFormationStateRec;
BFormationStateRec: TYPE = RECORD [
bPipe: ARRAY [0..1] OF ARRAY Dragon.Phase OF Dragon.HexByte
];

InitializeBFormation: Initializer = {
state: BFormationStateRef _ NEW[BFormationStateRec];
cell.realCellStuff.state _ state;
};

BFormationEvalSimple: SimpleEval =
BEGIN
drive: BFormationDriveRef _ NARROW[cell.realCellStuff.newDriveAsAny];
sw: BFormationSwitchIORef _ NARROW[cell.realCellStuff.switchIO];
newIO: BFormationSimpleIORef _ NARROW[cell.realCellStuff.newIO];
state: BFormationStateRef _ NARROW[cell.realCellStuff.state];
BEGIN OPEN drive, newIO, state;
 drive[XByte2] _ IF PhB THEN drive ELSE ignore;

IF PhA THEN {
bPipe[1][a]	_ bPipe[0][b] };
IF PhB THEN {
bBusLt, bBusRt, sum:	Dragon.HexByte;
bBusLt _ SELECT BSourceLtBA FROM
cBase	=>	Dragon.PRtoByte[euConstant],
aBase	=>	Dragon.PRtoByte[euAux],
s		=>	SAB,
l		=>	LAB,
iRef	=>	Dragon.PRtoByte[ifuXBus]+4,
zero	=>	0,
ENDCASE =>	ERROR;
bBusRt _ SELECT BSourceRtBA FROM
op47		=>	OpBA MOD 16,
alpha		=>	AlphaBA,
alpha03	=>	AlphaBA/16,
alpha47	=>	AlphaBA MOD 16,
beta		=>	BetaBA,
beta03		=>	BetaBA/16,
beta47		=>	BetaBA MOD 16,
ENDCASE	=>	SELECT BSourceOffBA FROM
zero		=>  0,
one		=>  1,
two		=>  2,
three		=>  3,
minus4	=> 256-4,
minus3	=> 256-3,
minus2	=> 256-2,
minus1	=> 256-1,
ENDCASE	=>	ERROR;
sum _ SELECT BSourceLtBA FROM
s, l		=>	(bBusLt + bBusRt) MOD 128,
ENDCASE	=>	(bBusLt + bBusRt) MOD 256;
IF PipeAdv0AB	THEN	BRegBA _ bPipe[0][b]	_ sum;
IF PipeAdv1AB	THEN	             bPipe[1][b]	_ bPipe[1][a];
IF PipeKill1AB	THEN	             bPipe[1][b]	_ Dragon.PRtoByte[euConstant];
XByte2 _ LOOPHOLE[bPipe[1][b]] }
END;
END;
CFormation: PUBLIC CellType;

CreateCFormationPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["IFUData2.CFormation.rosePorts"]};

CFormationSwitchIORef: TYPE = REF CFormationSwitchIORec;
CFormationSwitchIORec: TYPE = RECORD [
XByte1: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,OpBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,AlphaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BetaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,LAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,SAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,CSourceLtBA: PACKED ARRAY [0 .. 6) OF SwitchTypes.SwitchVal
,CSourceRtBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,CSourceOffBA: PACKED ARRAY [0 .. 3) OF SwitchTypes.SwitchVal
,ARegBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BRegBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,ARegIsC1BA: SwitchTypes.SwitchVal
,ARegIsC2BA: SwitchTypes.SwitchVal
,BRegIsC1BA: SwitchTypes.SwitchVal
,BRegIsC2BA: SwitchTypes.SwitchVal
,PipeAdv0AB: SwitchTypes.SwitchVal
,PipeAdv1AB: SwitchTypes.SwitchVal
,PipeAdv2AB: SwitchTypes.SwitchVal
,PipeAdv3AB: SwitchTypes.SwitchVal
,PipeKill1AB: SwitchTypes.SwitchVal
,PipeKill2AB: SwitchTypes.SwitchVal
,PipeCCTrap3AB: SwitchTypes.SwitchVal
,PipeFault3AB: SwitchTypes.SwitchVal
,PhA: SwitchTypes.SwitchVal
,PhB: SwitchTypes.SwitchVal
];

CFormationSimpleIORef: TYPE = REF CFormationSimpleIORec;
CFormationSimpleIORec: TYPE = RECORD [
fill0: [0 .. 255],
XByte1: [0..255]
,fill1: [0 .. 255],
OpBA: [0..255]
,fill2: [0 .. 255],
AlphaBA: [0..255]
,fill3: [0 .. 255],
BetaBA: [0..255]
,fill4: [0 .. 255],
LAB: [0..255]
,fill5: [0 .. 255],
SAB: [0..255]
,fill6: [0 .. 1023],
CSourceLtBA: ABCSourceLt
,fill7: [0 .. 255],
CSourceRtBA: ABCSourceRt
,fill8: [0 .. 8191],
CSourceOffBA: MinusOffset
,fill9: [0 .. 255],
ARegBA: [0..255]
,fill10: [0 .. 255],
BRegBA: [0..255]
,fill11: [0 .. 32767],
ARegIsC1BA: BOOLEAN
,fill12: [0 .. 32767],
ARegIsC2BA: BOOLEAN
,fill13: [0 .. 32767],
BRegIsC1BA: BOOLEAN
,fill14: [0 .. 32767],
BRegIsC2BA: BOOLEAN
,fill15: [0 .. 32767],
PipeAdv0AB: BOOLEAN
,fill16: [0 .. 32767],
PipeAdv1AB: BOOLEAN
,fill17: [0 .. 32767],
PipeAdv2AB: BOOLEAN
,fill18: [0 .. 32767],
PipeAdv3AB: BOOLEAN
,fill19: [0 .. 32767],
PipeKill1AB: BOOLEAN
,fill20: [0 .. 32767],
PipeKill2AB: BOOLEAN
,fill21: [0 .. 32767],
PipeCCTrap3AB: BOOLEAN
,fill22: [0 .. 32767],
PipeFault3AB: BOOLEAN
,fill23: [0 .. 32767],
PhA: BOOLEAN
,fill24: [0 .. 32767],
PhB: BOOLEAN
];

CFormationDriveRef: TYPE = REF CFormationDriveRec;
CFormationDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY CFormationPort OF DriveLevel];
CFormationPort: TYPE = {
XByte1, OpBA, AlphaBA, BetaBA, LAB, SAB, CSourceLtBA, CSourceRtBA, CSourceOffBA, ARegBA, BRegBA, ARegIsC1BA, ARegIsC2BA, BRegIsC1BA, BRegIsC2BA, PipeAdv0AB, PipeAdv1AB, PipeAdv2AB, PipeAdv3AB, PipeKill1AB, PipeKill2AB, PipeCCTrap3AB, PipeFault3AB, PhA, PhB, CFormationPortTypePad25, CFormationPortTypePad26, CFormationPortTypePad27};

CreateCFormationIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
ioAsAny _ IF switch THEN NEW[CFormationSwitchIORec] ELSE NEW[CFormationSimpleIORec];
};

CreateCFormationDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
driveAsAny _ NEW[CFormationDriveRec];
};

CFormationStateRef: TYPE = REF CFormationStateRec;
CFormationStateRec: TYPE = RECORD [
cPipe: ARRAY [0..3] OF ARRAY Dragon.Phase OF Dragon.HexByte
];

InitializeCFormation: Initializer = {
state: CFormationStateRef _ NEW[CFormationStateRec];
cell.realCellStuff.state _ state;
};

CFormationEvalSimple: SimpleEval =
BEGIN
drive: CFormationDriveRef _ NARROW[cell.realCellStuff.newDriveAsAny];
sw: CFormationSwitchIORef _ NARROW[cell.realCellStuff.switchIO];
newIO: CFormationSimpleIORef _ NARROW[cell.realCellStuff.newIO];
state: CFormationStateRef _ NARROW[cell.realCellStuff.state];
BEGIN OPEN drive, newIO, state;
noStore: Dragon.HexByte = Dragon.PRtoByte[euJunk];


drive[XByte1] _ IF PhB THEN drive ELSE ignore;

IF PhA THEN {
cPipe[1][a] _ cPipe[0][b];
cPipe[2][a] _ cPipe[1][b];
cPipe[3][a] _ cPipe[2][b] };

IF PhB THEN {
cBusLt, cBusRt, sum:	Dragon.HexByte;
cBusLt _ SELECT CSourceLtBA FROM
aBase	=>	Dragon.PRtoByte[euAux],
cBase	=>	Dragon.PRtoByte[euConstant],
l		=>	LAB,
s		=>	SAB,
zero	=>	0,
iRef	=>	Dragon.PRtoByte[ifuXBus]+4,
ENDCASE =>	ERROR;
cBusRt _ SELECT CSourceRtBA FROM
beta		=>	BetaBA,
beta03		=>	BetaBA/16,
beta47		=>	BetaBA MOD 16,
op47		=>	OpBA MOD 16,
alpha		=>	AlphaBA,
alpha03	=>	AlphaBA/16,
alpha47	=>	AlphaBA MOD 16,
ENDCASE	=>	SELECT CSourceOffBA FROM
minus4	=> 256-4,
minus3	=> 256-3,
minus2	=> 256-2,
minus1	=> 256-1,
zero		=>  0,
one		=>  1,
two		=>  2,
three		=>  3,
ENDCASE	=>	ERROR;
sum _ (cBusLt + cBusRt) MOD 256;
sum _ SELECT CSourceLtBA FROM s, l => sum MOD 128 ENDCASE	=> sum;

IF PipeAdv0AB		THEN	cPipe[0][b]	_ sum;
IF PipeAdv1AB		THEN	cPipe[1][b]	_ cPipe[1][a];
IF PipeKill1AB		THEN	cPipe[1][b]	_ noStore;
IF PipeAdv2AB		THEN	cPipe[2][b]	_ cPipe[2][a];
IF PipeKill2AB		THEN	cPipe[2][b]	_ noStore;
IF PipeAdv3AB		THEN	cPipe[3][b]	_ cPipe[3][a];
IF PipeCCTrap3AB	THEN	cPipe[3][b]	_ noStore;
IF PipeFault3AB		THEN	cPipe[3][b]	_ Dragon.PRtoByte[euMAR];

XByte1 _ LOOPHOLE[cPipe[3][b]];
ARegIsC1BA	_ (ARegBA = cPipe[1][b]); -- static logic
ARegIsC2BA	_ (ARegBA = cPipe[2][b]);
BRegIsC1BA	_ (BRegBA = cPipe[1][b]);
BRegIsC2BA	_ (BRegBA = cPipe[2][b]) };
END;
END;
ABCFormation: PUBLIC CellType;

CreateABCFormationPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["IFUData2.ABCFormation.rosePorts"]};

ABCFormationSwitchIORef: TYPE = REF ABCFormationSwitchIORec;
ABCFormationSwitchIORec: TYPE = RECORD [
XBus: PACKED ARRAY [0 .. 32) OF SwitchTypes.SwitchVal
,OpBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,AlphaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BetaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,LAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,SAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,ARegBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BRegBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,ASourceLtBA: PACKED ARRAY [0 .. 6) OF SwitchTypes.SwitchVal
,ASourceRtBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,ASourceOffBA: PACKED ARRAY [0 .. 3) OF SwitchTypes.SwitchVal
,BSourceLtBA: PACKED ARRAY [0 .. 6) OF SwitchTypes.SwitchVal
,BSourceRtBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BSourceOffBA: PACKED ARRAY [0 .. 3) OF SwitchTypes.SwitchVal
,CSourceLtBA: PACKED ARRAY [0 .. 6) OF SwitchTypes.SwitchVal
,CSourceRtBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,CSourceOffBA: PACKED ARRAY [0 .. 3) OF SwitchTypes.SwitchVal
,ARegIsC1BA: SwitchTypes.SwitchVal
,ARegIsC2BA: SwitchTypes.SwitchVal
,BRegIsC1BA: SwitchTypes.SwitchVal
,BRegIsC2BA: SwitchTypes.SwitchVal
,PipeAdv0AB: SwitchTypes.SwitchVal
,PipeAdv1AB: SwitchTypes.SwitchVal
,PipeAdv2AB: SwitchTypes.SwitchVal
,PipeAdv3AB: SwitchTypes.SwitchVal
,PipeKill1AB: SwitchTypes.SwitchVal
,PipeKill2AB: SwitchTypes.SwitchVal
,PipeCCTrap3AB: SwitchTypes.SwitchVal
,PipeFault3AB: SwitchTypes.SwitchVal
,PhA: SwitchTypes.SwitchVal
,PhB: SwitchTypes.SwitchVal
];

ABCFormationSimpleIORef: TYPE = REF ABCFormationSimpleIORec;
ABCFormationSimpleIORec: TYPE = RECORD [
XBus: ARRAY [0..2) OF CARDINAL
,fill1: [0 .. 255],
OpBA: [0..255]
,fill2: [0 .. 255],
AlphaBA: [0..255]
,fill3: [0 .. 255],
BetaBA: [0..255]
,fill4: [0 .. 255],
LAB: [0..255]
,fill5: [0 .. 255],
SAB: [0..255]
,fill6: [0 .. 255],
ARegBA: [0..255]
,fill7: [0 .. 255],
BRegBA: [0..255]
,fill8: [0 .. 1023],
ASourceLtBA: ABCSourceLt
,fill9: [0 .. 255],
ASourceRtBA: ABCSourceRt
,fill10: [0 .. 8191],
ASourceOffBA: PlusOffset
,fill11: [0 .. 1023],
BSourceLtBA: ABCSourceLt
,fill12: [0 .. 255],
BSourceRtBA: ABCSourceRt
,fill13: [0 .. 8191],
BSourceOffBA: PlusOffset
,fill14: [0 .. 1023],
CSourceLtBA: ABCSourceLt
,fill15: [0 .. 255],
CSourceRtBA: ABCSourceRt
,fill16: [0 .. 8191],
CSourceOffBA: MinusOffset
,fill17: [0 .. 32767],
ARegIsC1BA: BOOLEAN
,fill18: [0 .. 32767],
ARegIsC2BA: BOOLEAN
,fill19: [0 .. 32767],
BRegIsC1BA: BOOLEAN
,fill20: [0 .. 32767],
BRegIsC2BA: BOOLEAN
,fill21: [0 .. 32767],
PipeAdv0AB: BOOLEAN
,fill22: [0 .. 32767],
PipeAdv1AB: BOOLEAN
,fill23: [0 .. 32767],
PipeAdv2AB: BOOLEAN
,fill24: [0 .. 32767],
PipeAdv3AB: BOOLEAN
,fill25: [0 .. 32767],
PipeKill1AB: BOOLEAN
,fill26: [0 .. 32767],
PipeKill2AB: BOOLEAN
,fill27: [0 .. 32767],
PipeCCTrap3AB: BOOLEAN
,fill28: [0 .. 32767],
PipeFault3AB: BOOLEAN
,fill29: [0 .. 32767],
PhA: BOOLEAN
,fill30: [0 .. 32767],
PhB: BOOLEAN
];

ABCFormationDriveRef: TYPE = REF ABCFormationDriveRec;
ABCFormationDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY ABCFormationPort OF DriveLevel];
ABCFormationPort: TYPE = {
XBus, OpBA, AlphaBA, BetaBA, LAB, SAB, ARegBA, BRegBA, ASourceLtBA, ASourceRtBA, ASourceOffBA, BSourceLtBA, BSourceRtBA, BSourceOffBA, CSourceLtBA, CSourceRtBA, CSourceOffBA, ARegIsC1BA, ARegIsC2BA, BRegIsC1BA, BRegIsC2BA, PipeAdv0AB, PipeAdv1AB, PipeAdv2AB, PipeAdv3AB, PipeKill1AB, PipeKill2AB, PipeCCTrap3AB, PipeFault3AB, PhA, PhB, ABCFormationPortTypePad31};

CreateABCFormationIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
ioAsAny _ IF switch THEN NEW[ABCFormationSwitchIORec] ELSE NEW[ABCFormationSimpleIORec];
};

CreateABCFormationDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
driveAsAny _ NEW[ABCFormationDriveRec];
};

ABCFormationExpand: PROC [thisCell: Cell, to: ExpansionReceiver] --ExpandProc-- = {
PrivateLookupNode: PROC [name: ROPE] RETURNS [node: Node] = {node _ RoseCreate.LookupNode[from: thisCell, path: LIST[name]]};
XBus: Node _ PrivateLookupNode["XBus"];
OpBA: Node _ PrivateLookupNode["OpBA"];
AlphaBA: Node _ PrivateLookupNode["AlphaBA"];
BetaBA: Node _ PrivateLookupNode["BetaBA"];
LAB: Node _ PrivateLookupNode["LAB"];
SAB: Node _ PrivateLookupNode["SAB"];
ARegBA: Node _ PrivateLookupNode["ARegBA"];
BRegBA: Node _ PrivateLookupNode["BRegBA"];
ASourceLtBA: Node _ PrivateLookupNode["ASourceLtBA"];
ASourceRtBA: Node _ PrivateLookupNode["ASourceRtBA"];
ASourceOffBA: Node _ PrivateLookupNode["ASourceOffBA"];
BSourceLtBA: Node _ PrivateLookupNode["BSourceLtBA"];
BSourceRtBA: Node _ PrivateLookupNode["BSourceRtBA"];
BSourceOffBA: Node _ PrivateLookupNode["BSourceOffBA"];
CSourceLtBA: Node _ PrivateLookupNode["CSourceLtBA"];
CSourceRtBA: Node _ PrivateLookupNode["CSourceRtBA"];
CSourceOffBA: Node _ PrivateLookupNode["CSourceOffBA"];
ARegIsC1BA: Node _ PrivateLookupNode["ARegIsC1BA"];
ARegIsC2BA: Node _ PrivateLookupNode["ARegIsC2BA"];
BRegIsC1BA: Node _ PrivateLookupNode["BRegIsC1BA"];
BRegIsC2BA: Node _ PrivateLookupNode["BRegIsC2BA"];
PipeAdv0AB: Node _ PrivateLookupNode["PipeAdv0AB"];
PipeAdv1AB: Node _ PrivateLookupNode["PipeAdv1AB"];
PipeAdv2AB: Node _ PrivateLookupNode["PipeAdv2AB"];
PipeAdv3AB: Node _ PrivateLookupNode["PipeAdv3AB"];
PipeKill1AB: Node _ PrivateLookupNode["PipeKill1AB"];
PipeKill2AB: Node _ PrivateLookupNode["PipeKill2AB"];
PipeCCTrap3AB: Node _ PrivateLookupNode["PipeCCTrap3AB"];
PipeFault3AB: Node _ PrivateLookupNode["PipeFault3AB"];
PhA: Node _ PrivateLookupNode["PhA"];
PhB: Node _ PrivateLookupNode["PhB"];
others: SymbolTable _ RoseCreate.GetOthers[otherss, "ABCFormation"];
NodeCreateHack1: PROC [name: ROPE] RETURNS [node: Node] = {node _ to.class.NodeInstance[erInstance: to.instance, name: name, type: NumTypes.NumType[8], other: RoseCreate.GetOther[others, name]]};
XByte0: Node _ NodeCreateHack1["XByte0"];
XByte1: Node _ NodeCreateHack1["XByte1"];
XByte2: Node _ NodeCreateHack1["XByte2"];
XByte3: Node _ NodeCreateHack1["XByte3"];
to.class.Equivalence[
to.instance,
NEW [NodeExpressionRep.primary _ [primary[XBus, [whole[]]]]],
NEW [NodeExpressionRep.catenate _ [catenate[LIST[
NEW [NodeExpressionRep.primary _ [primary[XByte0, [whole[]]]]],
NEW [NodeExpressionRep.primary _ [primary[XByte1, [whole[]]]]],
NEW [NodeExpressionRep.primary _ [primary[XByte2, [whole[]]]]],
NEW [NodeExpressionRep.primary _ [primary[XByte3, [whole[]]]]]
]]]]
];
[] _ to.class.CellInstance[erInstance: to.instance, instanceName: "aFormation", typeName: "AFormation", other: RoseCreate.GetOther[others, "aFormation"], interfaceNodes: ""];
[] _ to.class.CellInstance[erInstance: to.instance, instanceName: "bFormation", typeName: "BFormation", other: RoseCreate.GetOther[others, "bFormation"], interfaceNodes: ""];
[] _ to.class.CellInstance[erInstance: to.instance, instanceName: "cFormation", typeName: "CFormation", other: RoseCreate.GetOther[others, "cFormation"], interfaceNodes: ""];
};

RegisterCells[];

END.

¦IFUData2Impl.Mesa
created by RoseTranslate 3.1.3 of September 5, 1985 12:14:34 pm PDT
created from IFUData2.Rose of September 24, 1985 8:03:58 pm PDT
created for curry.pa
created at September 24, 1985 8:04:19 pm PDT
Signal Type decls

Pipe
lBusLt
LBusRt
Sum
XBus _ BitOps.ICID[aPipe[1][b], XBus, 32, 3*8, 8] };
XBus _ BitOps.ICID[bPipe[1][b], XBus, 32, 2*8, 8] };
XBus _ BitOps.ICID[cPipe[3][b], XBus, 32, 1*8, 8];
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