DIRECTORY
RoseTypes, IFUData2ABC, RoseCreate, DragOpsCross, DragonRoseExtras, SwitchTypes, IFUPLAInstrDecode, Dragon, NumTypes;

IFUData2ABCImpl: CEDAR PROGRAM
IMPORTS RoseCreate, DragonRoseExtras, NumTypes
EXPORTS IFUData2ABC

= BEGIN OPEN
RoseTypes, IFUData2ABC;

ABCSourceLt: TYPE = IFUPLAInstrDecode.ABCSourceLt;
ABCSourceRt: TYPE = IFUPLAInstrDecode.ABCSourceRt;
PlusOffset: TYPE = IFUPLAInstrDecode.PlusOffset;
MinusOffset: TYPE = IFUPLAInstrDecode.MinusOffset;
PBusFaults: TYPE = Dragon.PBusFaults;
ALULeftSources: TYPE = Dragon.ALULeftSources;
ALURightSources: TYPE = Dragon.ALURightSources;
Store2ASources: TYPE = Dragon.Store2ASources;


RegisterCells: PROC =
BEGIN
AFormation _ RoseCreate.RegisterCellType[name: "AFormation",
expandProc: NIL,
ioCreator: CreateAFormationIO, driveCreator: CreateAFormationDrive, initializer: InitializeAFormation,
evals: [EvalSimple: AFormationEvalSimple],
tests: LIST[],
ports: CreateAFormationPorts[]
];
BFormation _ RoseCreate.RegisterCellType[name: "BFormation",
expandProc: NIL,
ioCreator: CreateBFormationIO, driveCreator: CreateBFormationDrive, initializer: InitializeBFormation,
evals: [EvalSimple: BFormationEvalSimple],
tests: LIST[],
ports: CreateBFormationPorts[]
];
CFormation _ RoseCreate.RegisterCellType[name: "CFormation",
expandProc: NIL,
ioCreator: CreateCFormationIO, driveCreator: CreateCFormationDrive, initializer: InitializeCFormation,
evals: [EvalSimple: CFormationEvalSimple],
tests: LIST[],
ports: CreateCFormationPorts[]
];
ABCFormation _ RoseCreate.RegisterCellType[name: "ABCFormation",
expandProc: ABCFormationExpand,
ioCreator: CreateABCFormationIO, driveCreator: CreateABCFormationDrive, 
evals: [],
tests: LIST[],
ports: CreateABCFormationPorts[]
];
END;
otherss: SymbolTable _ RoseCreate.GetOtherss["IFUData2ABC.partsAssertions"];
AFormation: PUBLIC CellType;

CreateAFormationPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["IFUData2ABC.AFormation.rosePorts"]};

AFormationSwitchIORef: TYPE = REF AFormationSwitchIORec;
AFormationSwitchIORec: TYPE = RECORD [
ARegAddr: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,OpBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,AlphaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BetaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,LAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,SAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,AReg0BA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,AReg1BA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,ASourceLtBA: PACKED ARRAY [0 .. 5) OF SwitchTypes.SwitchVal
,ASourceRtBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,ASourceOffBA: PACKED ARRAY [0 .. 3) OF SwitchTypes.SwitchVal
,LoadStage1Ac: SwitchTypes.SwitchVal
,LoadStage1Bc: SwitchTypes.SwitchVal
,PhA: SwitchTypes.SwitchVal
,PhB: SwitchTypes.SwitchVal
];

AFormationSimpleIORef: TYPE = REF AFormationSimpleIORec;
AFormationSimpleIORec: TYPE = RECORD [
fill0: [0 .. 255],
ARegAddr: [0..255]
,fill1: [0 .. 255],
OpBA: [0..255]
,fill2: [0 .. 255],
AlphaBA: [0..255]
,fill3: [0 .. 255],
BetaBA: [0..255]
,fill4: [0 .. 255],
LAB: [0..255]
,fill5: [0 .. 255],
SAB: [0..255]
,fill6: [0 .. 255],
AReg0BA: [0..255]
,fill7: [0 .. 255],
AReg1BA: [0..255]
,fill8: [0 .. 2047],
ASourceLtBA: ABCSourceLt
,fill9: [0 .. 255],
ASourceRtBA: ABCSourceRt
,fill10: [0 .. 8191],
ASourceOffBA: PlusOffset
,fill11: [0 .. 32767],
LoadStage1Ac: BOOLEAN
,fill12: [0 .. 32767],
LoadStage1Bc: BOOLEAN
,fill13: [0 .. 32767],
PhA: BOOLEAN
,fill14: [0 .. 32767],
PhB: BOOLEAN
];

AFormationDriveRef: TYPE = REF AFormationDriveRec;
AFormationDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY AFormationPort OF DriveLevel];
AFormationPort: TYPE = {
ARegAddr, OpBA, AlphaBA, BetaBA, LAB, SAB, AReg0BA, AReg1BA, ASourceLtBA, ASourceRtBA, ASourceOffBA, LoadStage1Ac, LoadStage1Bc, PhA, PhB, AFormationPortTypePad15};

CreateAFormationIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
ioAsAny _ IF switch THEN NEW[AFormationSwitchIORec] ELSE NEW[AFormationSimpleIORec];
};

CreateAFormationDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
driveAsAny _ NEW[AFormationDriveRec];
};

AFormationStateRef: TYPE = REF AFormationStateRec;
AFormationStateRec: TYPE = RECORD [
aPipe: ARRAY [0..1] OF ARRAY Dragon.Phase OF Dragon.HexByte
];

InitializeAFormation: Initializer = {
state: AFormationStateRef _ NEW[AFormationStateRec];
cell.realCellStuff.state _ state;
};

AFormationEvalSimple: SimpleEval =
BEGIN
drive: AFormationDriveRef _ NARROW[cell.realCellStuff.newDriveAsAny];
sw: AFormationSwitchIORef _ NARROW[cell.realCellStuff.switchIO];
newIO: AFormationSimpleIORef _ NARROW[cell.realCellStuff.newIO];
state: AFormationStateRef _ NARROW[cell.realCellStuff.state];
BEGIN OPEN drive, newIO, state;

IF PhB THEN {
aBusLt, aBusRt, sum:	Dragon.HexByte;
aBusLt _ SELECT ASourceLtBA FROM
cBase	=>	DragonRoseExtras.PRtoByte[euConstant],
aBase	=>	DragonRoseExtras.PRtoByte[euAux],
s		=>	SAB,
l		=>	LAB,
zero	=>	0,
ENDCASE =>	ERROR;
aBusRt _ SELECT ASourceRtBA FROM
alpha		=>	AlphaBA,
alpha03	=>	AlphaBA/16,
alpha47	=>	AlphaBA MOD 16,
op47		=>	OpBA MOD 16,
beta		=>	BetaBA,
beta03		=>	BetaBA/16,
beta47		=>	BetaBA MOD 16,
ENDCASE	=>	SELECT ASourceOffBA FROM
zero		=>  0,
one		=>  1,
two		=>  2,
three		=>  3,
minus4	=> 256-4,
minus3	=> 256-3,
minus2	=> 256-2,
minus1	=> 256-1,
ENDCASE	=> ERROR;
sum _ SELECT ASourceLtBA FROM
s, l		=> (aBusLt + aBusRt) MOD 128,
ENDCASE	=> (aBusLt + aBusRt) MOD 256;

aPipe[0][b] _ sum;
};

IF LoadStage1Ac THEN aPipe[1][a] _ aPipe[0][b];
IF LoadStage1Bc THEN aPipe[1][b] _ aPipe[1][a];

AReg0BA _ aPipe[0][b];
AReg1BA _ aPipe[1][b];
drive[ARegAddr] _ IF PhB THEN drive ELSE ignore;
ARegAddr _ aPipe[1][b];

END;
END;
BFormation: PUBLIC CellType;

CreateBFormationPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["IFUData2ABC.BFormation.rosePorts"]};

BFormationSwitchIORef: TYPE = REF BFormationSwitchIORec;
BFormationSwitchIORec: TYPE = RECORD [
BRegAddr: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,OpBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,AlphaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BetaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,LAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,SAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BReg0BA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BReg1BA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BSourceLtBA: PACKED ARRAY [0 .. 5) OF SwitchTypes.SwitchVal
,BSourceRtBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BSourceOffBA: PACKED ARRAY [0 .. 3) OF SwitchTypes.SwitchVal
,LoadStage1Ac: SwitchTypes.SwitchVal
,LoadStage1Bc: SwitchTypes.SwitchVal
,PhA: SwitchTypes.SwitchVal
,PhB: SwitchTypes.SwitchVal
];

BFormationSimpleIORef: TYPE = REF BFormationSimpleIORec;
BFormationSimpleIORec: TYPE = RECORD [
fill0: [0 .. 255],
BRegAddr: [0..255]
,fill1: [0 .. 255],
OpBA: [0..255]
,fill2: [0 .. 255],
AlphaBA: [0..255]
,fill3: [0 .. 255],
BetaBA: [0..255]
,fill4: [0 .. 255],
LAB: [0..255]
,fill5: [0 .. 255],
SAB: [0..255]
,fill6: [0 .. 255],
BReg0BA: [0..255]
,fill7: [0 .. 255],
BReg1BA: [0..255]
,fill8: [0 .. 2047],
BSourceLtBA: ABCSourceLt
,fill9: [0 .. 255],
BSourceRtBA: ABCSourceRt
,fill10: [0 .. 8191],
BSourceOffBA: PlusOffset
,fill11: [0 .. 32767],
LoadStage1Ac: BOOLEAN
,fill12: [0 .. 32767],
LoadStage1Bc: BOOLEAN
,fill13: [0 .. 32767],
PhA: BOOLEAN
,fill14: [0 .. 32767],
PhB: BOOLEAN
];

BFormationDriveRef: TYPE = REF BFormationDriveRec;
BFormationDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY BFormationPort OF DriveLevel];
BFormationPort: TYPE = {
BRegAddr, OpBA, AlphaBA, BetaBA, LAB, SAB, BReg0BA, BReg1BA, BSourceLtBA, BSourceRtBA, BSourceOffBA, LoadStage1Ac, LoadStage1Bc, PhA, PhB, BFormationPortTypePad15};

CreateBFormationIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
ioAsAny _ IF switch THEN NEW[BFormationSwitchIORec] ELSE NEW[BFormationSimpleIORec];
};

CreateBFormationDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
driveAsAny _ NEW[BFormationDriveRec];
};

BFormationStateRef: TYPE = REF BFormationStateRec;
BFormationStateRec: TYPE = RECORD [
bPipe: ARRAY [0..1] OF ARRAY Dragon.Phase OF Dragon.HexByte
];

InitializeBFormation: Initializer = {
state: BFormationStateRef _ NEW[BFormationStateRec];
cell.realCellStuff.state _ state;
};

BFormationEvalSimple: SimpleEval =
BEGIN
drive: BFormationDriveRef _ NARROW[cell.realCellStuff.newDriveAsAny];
sw: BFormationSwitchIORef _ NARROW[cell.realCellStuff.switchIO];
newIO: BFormationSimpleIORef _ NARROW[cell.realCellStuff.newIO];
state: BFormationStateRef _ NARROW[cell.realCellStuff.state];
BEGIN OPEN drive, newIO, state;

IF PhB THEN {
bBusLt, bBusRt, sum:	Dragon.HexByte;
bBusLt _ SELECT BSourceLtBA FROM
cBase	=>	DragonRoseExtras.PRtoByte[euConstant],
aBase	=>	DragonRoseExtras.PRtoByte[euAux],
s		=>	SAB,
l		=>	LAB,
zero	=>	0,
ENDCASE =>	ERROR;
bBusRt _ SELECT BSourceRtBA FROM
op47		=>	OpBA MOD 16,
alpha		=>	AlphaBA,
alpha03	=>	AlphaBA/16,
alpha47	=>	AlphaBA MOD 16,
beta		=>	BetaBA,
beta03		=>	BetaBA/16,
beta47		=>	BetaBA MOD 16,
ENDCASE	=>	SELECT BSourceOffBA FROM
zero		=>  0,
one		=>  1,
two		=>  2,
three		=>  3,
minus4	=> 256-4,
minus3	=> 256-3,
minus2	=> 256-2,
minus1	=> 256-1,
ENDCASE	=>	ERROR;
sum _ SELECT BSourceLtBA FROM
s, l		=>	(bBusLt + bBusRt) MOD 128,
ENDCASE	=>	(bBusLt + bBusRt) MOD 256;

bPipe[0][b] _ sum;
};

IF LoadStage1Ac THEN bPipe[1][a] _ bPipe[0][b];
IF LoadStage1Bc THEN bPipe[1][b] _ bPipe[1][a];

BReg0BA _ bPipe[0][b];
BReg1BA _ bPipe[1][b];
drive[BRegAddr] _ IF PhB THEN drive ELSE ignore;
BRegAddr _ bPipe[1][b];

END;
END;
CFormation: PUBLIC CellType;

CreateCFormationPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["IFUData2ABC.CFormation.rosePorts"]};

CFormationSwitchIORef: TYPE = REF CFormationSwitchIORec;
CFormationSwitchIORec: TYPE = RECORD [
CRegAddr: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,OpBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,AlphaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BetaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,LAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,SAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,CSourceLtBA: PACKED ARRAY [0 .. 5) OF SwitchTypes.SwitchVal
,CSourceRtBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,CSourceOffBA: PACKED ARRAY [0 .. 3) OF SwitchTypes.SwitchVal
,AReg1BA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BReg1BA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,CReg0BA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,ARegIsC2BA: SwitchTypes.SwitchVal
,ARegIsC3BA: SwitchTypes.SwitchVal
,BRegIsC2BA: SwitchTypes.SwitchVal
,BRegIsC3BA: SwitchTypes.SwitchVal
,LoadStage1Ac: SwitchTypes.SwitchVal
,LoadStage1Bc: SwitchTypes.SwitchVal
,LoadStage2Ac: SwitchTypes.SwitchVal
,BubbleStage2A1BA: SwitchTypes.SwitchVal
,NormalStage2A1BA: SwitchTypes.SwitchVal
,AbortStage2B2AB: SwitchTypes.SwitchVal
,NormalStage2B2AB: SwitchTypes.SwitchVal
,LoadStage3Ac: SwitchTypes.SwitchVal
,AbortStage3A2BA: SwitchTypes.SwitchVal
,NormalStage3A2BA: SwitchTypes.SwitchVal
,DPFaultB: PACKED ARRAY [0 .. 4) OF SwitchTypes.SwitchVal
,PhA: SwitchTypes.SwitchVal
,PhB: SwitchTypes.SwitchVal
];

CFormationSimpleIORef: TYPE = REF CFormationSimpleIORec;
CFormationSimpleIORec: TYPE = RECORD [
fill0: [0 .. 255],
CRegAddr: [0..255]
,fill1: [0 .. 255],
OpBA: [0..255]
,fill2: [0 .. 255],
AlphaBA: [0..255]
,fill3: [0 .. 255],
BetaBA: [0..255]
,fill4: [0 .. 255],
LAB: [0..255]
,fill5: [0 .. 255],
SAB: [0..255]
,fill6: [0 .. 2047],
CSourceLtBA: ABCSourceLt
,fill7: [0 .. 255],
CSourceRtBA: ABCSourceRt
,fill8: [0 .. 8191],
CSourceOffBA: MinusOffset
,fill9: [0 .. 255],
AReg1BA: [0..255]
,fill10: [0 .. 255],
BReg1BA: [0..255]
,fill11: [0 .. 255],
CReg0BA: [0..255]
,fill12: [0 .. 32767],
ARegIsC2BA: BOOLEAN
,fill13: [0 .. 32767],
ARegIsC3BA: BOOLEAN
,fill14: [0 .. 32767],
BRegIsC2BA: BOOLEAN
,fill15: [0 .. 32767],
BRegIsC3BA: BOOLEAN
,fill16: [0 .. 32767],
LoadStage1Ac: BOOLEAN
,fill17: [0 .. 32767],
LoadStage1Bc: BOOLEAN
,fill18: [0 .. 32767],
LoadStage2Ac: BOOLEAN
,fill19: [0 .. 32767],
BubbleStage2A1BA: BOOLEAN
,fill20: [0 .. 32767],
NormalStage2A1BA: BOOLEAN
,fill21: [0 .. 32767],
AbortStage2B2AB: BOOLEAN
,fill22: [0 .. 32767],
NormalStage2B2AB: BOOLEAN
,fill23: [0 .. 32767],
LoadStage3Ac: BOOLEAN
,fill24: [0 .. 32767],
AbortStage3A2BA: BOOLEAN
,fill25: [0 .. 32767],
NormalStage3A2BA: BOOLEAN
,fill26: [0 .. 4095],
DPFaultB: PBusFaults
,fill27: [0 .. 32767],
PhA: BOOLEAN
,fill28: [0 .. 32767],
PhB: BOOLEAN
];

CFormationDriveRef: TYPE = REF CFormationDriveRec;
CFormationDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY CFormationPort OF DriveLevel];
CFormationPort: TYPE = {
CRegAddr, OpBA, AlphaBA, BetaBA, LAB, SAB, CSourceLtBA, CSourceRtBA, CSourceOffBA, AReg1BA, BReg1BA, CReg0BA, ARegIsC2BA, ARegIsC3BA, BRegIsC2BA, BRegIsC3BA, LoadStage1Ac, LoadStage1Bc, LoadStage2Ac, BubbleStage2A1BA, NormalStage2A1BA, AbortStage2B2AB, NormalStage2B2AB, LoadStage3Ac, AbortStage3A2BA, NormalStage3A2BA, DPFaultB, PhA, PhB, CFormationPortTypePad29, CFormationPortTypePad30, CFormationPortTypePad31};

CreateCFormationIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
ioAsAny _ IF switch THEN NEW[CFormationSwitchIORec] ELSE NEW[CFormationSimpleIORec];
};

CreateCFormationDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
driveAsAny _ NEW[CFormationDriveRec];
};

CFormationStateRef: TYPE = REF CFormationStateRec;
CFormationStateRec: TYPE = RECORD [
cPipe: ARRAY [0..3] OF ARRAY Dragon.Phase OF Dragon.HexByte,
dpFaultedAB, dpFaultedBA: BOOL
];

InitializeCFormation: Initializer = {
state: CFormationStateRef _ NEW[CFormationStateRec];
cell.realCellStuff.state _ state;
};

CFormationEvalSimple: SimpleEval =
BEGIN
drive: CFormationDriveRef _ NARROW[cell.realCellStuff.newDriveAsAny];
sw: CFormationSwitchIORef _ NARROW[cell.realCellStuff.switchIO];
newIO: CFormationSimpleIORef _ NARROW[cell.realCellStuff.newIO];
state: CFormationStateRef _ NARROW[cell.realCellStuff.state];
BEGIN OPEN drive, newIO, state;
noStore: Dragon.HexByte = DragonRoseExtras.PRtoByte[euJunk];

IF PhB THEN {
cBusLt, cBusRt, sum:	Dragon.HexByte;
cBusLt _ SELECT CSourceLtBA FROM
aBase	=>	DragonRoseExtras.PRtoByte[euAux],
cBase	=>	DragonRoseExtras.PRtoByte[euConstant],
l		=>	LAB,
s		=>	SAB,
zero	=>	0,
ENDCASE =>	ERROR;
cBusRt _ SELECT CSourceRtBA FROM
beta		=>	BetaBA,
beta03		=>	BetaBA/16,
beta47		=>	BetaBA MOD 16,
op47		=>	OpBA MOD 16,
alpha		=>	AlphaBA,
alpha03	=>	AlphaBA/16,
alpha47	=>	AlphaBA MOD 16,
ENDCASE	=>	SELECT CSourceOffBA FROM
minus4	=> 256-4,
minus3	=> 256-3,
minus2	=> 256-2,
minus1	=> 256-1,
zero		=>  0,
one		=>  1,
two		=>  2,
three		=>  3,
ENDCASE	=>	ERROR;
sum _ (cBusLt + cBusRt) MOD 256;
sum _ SELECT CSourceLtBA FROM s, l => sum MOD 128 ENDCASE	=> sum;

cPipe[0][b] _ sum;
};

IF PhA THEN dpFaultedAB _ dpFaultedBA;
IF PhB THEN dpFaultedBA _ DPFaultB # none;

IF LoadStage1Ac THEN cPipe[1][a] _ cPipe[0][b];
IF LoadStage1Bc THEN cPipe[1][b] _ cPipe[1][a];
IF LoadStage2Ac THEN cPipe[2][a] _ (SELECT TRUE FROM
BubbleStage2A1BA => noStore,
NormalStage2A1BA => cPipe[1][b],
ENDCASE => ERROR);
IF PhB THEN cPipe[2][b] _ (SELECT TRUE FROM
AbortStage2B2AB => noStore,
NormalStage2B2AB => cPipe[2][a],
ENDCASE => ERROR);
IF LoadStage3Ac THEN cPipe[3][a] _ (SELECT TRUE FROM
AbortStage3A2BA => noStore,
NormalStage3A2BA => cPipe[2][b],
ENDCASE => ERROR);
IF PhB THEN cPipe[3][b] _ (SELECT TRUE FROM
dpFaultedAB => DragonRoseExtras.PRtoByte[euJunk],
NOT dpFaultedAB => cPipe[3][a],
ENDCASE => ERROR);

CReg0BA _ cPipe[0][b];
drive[CRegAddr] _ IF PhB THEN drive ELSE ignore;
CRegAddr _ LOOPHOLE[cPipe[3][b]];

ARegIsC2BA	_ (AReg1BA = cPipe[2][a]); -- static logic
ARegIsC3BA	_ (AReg1BA = cPipe[3][a]);
BRegIsC2BA	_ (BReg1BA = cPipe[2][a]);
BRegIsC3BA	_ (BReg1BA = cPipe[3][a]);

END;
END;
ABCFormation: PUBLIC CellType;

CreateABCFormationPorts: PROC RETURNS [ports: Ports] = {ports _ RoseCreate.PortsFromFile["IFUData2ABC.ABCFormation.rosePorts"]};

ABCFormationSwitchIORef: TYPE = REF ABCFormationSwitchIORec;
ABCFormationSwitchIORec: TYPE = RECORD [
XBus: PACKED ARRAY [0 .. 32) OF SwitchTypes.SwitchVal
,OpBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,AlphaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BetaBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,LAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,SAB: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,AReg0BA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BReg0BA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,CReg0BA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,ASourceLtBA: PACKED ARRAY [0 .. 5) OF SwitchTypes.SwitchVal
,ASourceRtBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,ASourceOffBA: PACKED ARRAY [0 .. 3) OF SwitchTypes.SwitchVal
,BSourceLtBA: PACKED ARRAY [0 .. 5) OF SwitchTypes.SwitchVal
,BSourceRtBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,BSourceOffBA: PACKED ARRAY [0 .. 3) OF SwitchTypes.SwitchVal
,CSourceLtBA: PACKED ARRAY [0 .. 5) OF SwitchTypes.SwitchVal
,CSourceRtBA: PACKED ARRAY [0 .. 8) OF SwitchTypes.SwitchVal
,CSourceOffBA: PACKED ARRAY [0 .. 3) OF SwitchTypes.SwitchVal
,CRegIsField3B: SwitchTypes.SwitchVal
,EUAluLeftSrc1B: PACKED ARRAY [0 .. 2) OF SwitchTypes.SwitchVal
,EUAluRightSrc1B: PACKED ARRAY [0 .. 3) OF SwitchTypes.SwitchVal
,EUStore2ASrc1B: PACKED ARRAY [0 .. 2) OF SwitchTypes.SwitchVal
,ARegIsC2BA: SwitchTypes.SwitchVal
,ARegIsC3BA: SwitchTypes.SwitchVal
,BRegIsC2BA: SwitchTypes.SwitchVal
,BRegIsC3BA: SwitchTypes.SwitchVal
,LoadStage1Ac: SwitchTypes.SwitchVal
,LoadStage1Bc: SwitchTypes.SwitchVal
,LoadStage2Ac: SwitchTypes.SwitchVal
,BubbleStage2A1BA: SwitchTypes.SwitchVal
,NormalStage2A1BA: SwitchTypes.SwitchVal
,AbortStage2B2AB: SwitchTypes.SwitchVal
,NormalStage2B2AB: SwitchTypes.SwitchVal
,LoadStage3Ac: SwitchTypes.SwitchVal
,AbortStage3A2BA: SwitchTypes.SwitchVal
,NormalStage3A2BA: SwitchTypes.SwitchVal
,DPFaultB: PACKED ARRAY [0 .. 4) OF SwitchTypes.SwitchVal
,PhA: SwitchTypes.SwitchVal
,PhB: SwitchTypes.SwitchVal
];

ABCFormationSimpleIORef: TYPE = REF ABCFormationSimpleIORec;
ABCFormationSimpleIORec: TYPE = RECORD [
XBus: ARRAY [0..2) OF CARDINAL
,fill1: [0 .. 255],
OpBA: [0..255]
,fill2: [0 .. 255],
AlphaBA: [0..255]
,fill3: [0 .. 255],
BetaBA: [0..255]
,fill4: [0 .. 255],
LAB: [0..255]
,fill5: [0 .. 255],
SAB: [0..255]
,fill6: [0 .. 255],
AReg0BA: [0..255]
,fill7: [0 .. 255],
BReg0BA: [0..255]
,fill8: [0 .. 255],
CReg0BA: [0..255]
,fill9: [0 .. 2047],
ASourceLtBA: ABCSourceLt
,fill10: [0 .. 255],
ASourceRtBA: ABCSourceRt
,fill11: [0 .. 8191],
ASourceOffBA: PlusOffset
,fill12: [0 .. 2047],
BSourceLtBA: ABCSourceLt
,fill13: [0 .. 255],
BSourceRtBA: ABCSourceRt
,fill14: [0 .. 8191],
BSourceOffBA: PlusOffset
,fill15: [0 .. 2047],
CSourceLtBA: ABCSourceLt
,fill16: [0 .. 255],
CSourceRtBA: ABCSourceRt
,fill17: [0 .. 8191],
CSourceOffBA: MinusOffset
,fill18: [0 .. 32767],
CRegIsField3B: BOOLEAN
,fill19: [0 .. 16383],
EUAluLeftSrc1B: ALULeftSources
,fill20: [0 .. 8191],
EUAluRightSrc1B: ALURightSources
,fill21: [0 .. 16383],
EUStore2ASrc1B: Store2ASources
,fill22: [0 .. 32767],
ARegIsC2BA: BOOLEAN
,fill23: [0 .. 32767],
ARegIsC3BA: BOOLEAN
,fill24: [0 .. 32767],
BRegIsC2BA: BOOLEAN
,fill25: [0 .. 32767],
BRegIsC3BA: BOOLEAN
,fill26: [0 .. 32767],
LoadStage1Ac: BOOLEAN
,fill27: [0 .. 32767],
LoadStage1Bc: BOOLEAN
,fill28: [0 .. 32767],
LoadStage2Ac: BOOLEAN
,fill29: [0 .. 32767],
BubbleStage2A1BA: BOOLEAN
,fill30: [0 .. 32767],
NormalStage2A1BA: BOOLEAN
,fill31: [0 .. 32767],
AbortStage2B2AB: BOOLEAN
,fill32: [0 .. 32767],
NormalStage2B2AB: BOOLEAN
,fill33: [0 .. 32767],
LoadStage3Ac: BOOLEAN
,fill34: [0 .. 32767],
AbortStage3A2BA: BOOLEAN
,fill35: [0 .. 32767],
NormalStage3A2BA: BOOLEAN
,fill36: [0 .. 4095],
DPFaultB: PBusFaults
,fill37: [0 .. 32767],
PhA: BOOLEAN
,fill38: [0 .. 32767],
PhB: BOOLEAN
];

ABCFormationDriveRef: TYPE = REF ABCFormationDriveRec;
ABCFormationDriveRec: TYPE = RECORD [driveRecordInitialPadding: DriveTagType, drive: PACKED ARRAY ABCFormationPort OF DriveLevel];
ABCFormationPort: TYPE = {
XBus, OpBA, AlphaBA, BetaBA, LAB, SAB, AReg0BA, BReg0BA, CReg0BA, ASourceLtBA, ASourceRtBA, ASourceOffBA, BSourceLtBA, BSourceRtBA, BSourceOffBA, CSourceLtBA, CSourceRtBA, CSourceOffBA, CRegIsField3B, EUAluLeftSrc1B, EUAluRightSrc1B, EUStore2ASrc1B, ARegIsC2BA, ARegIsC3BA, BRegIsC2BA, BRegIsC3BA, LoadStage1Ac, LoadStage1Bc, LoadStage2Ac, BubbleStage2A1BA, NormalStage2A1BA, AbortStage2B2AB, NormalStage2B2AB, LoadStage3Ac, AbortStage3A2BA, NormalStage3A2BA, DPFaultB, PhA, PhB, ABCFormationPortTypePad39};

CreateABCFormationIO: PROC [ct: CellType, switch: BOOL] RETURNS [ioAsAny: REF ANY] --IOCreator-- = {
ioAsAny _ IF switch THEN NEW[ABCFormationSwitchIORec] ELSE NEW[ABCFormationSimpleIORec];
};

CreateABCFormationDrive: PROC [ct: CellType] RETURNS [driveAsAny: REF ANY] --DriveCreator-- = {
driveAsAny _ NEW[ABCFormationDriveRec];
};

ABCFormationExpand: PROC [thisCell: Cell, to: ExpansionReceiver] --ExpandProc-- = {
PrivateLookupNode: PROC [name: ROPE] RETURNS [node: Node] = {node _ RoseCreate.LookupNode[from: thisCell, path: LIST[name]]};
XBus: Node _ PrivateLookupNode["XBus"];
OpBA: Node _ PrivateLookupNode["OpBA"];
AlphaBA: Node _ PrivateLookupNode["AlphaBA"];
BetaBA: Node _ PrivateLookupNode["BetaBA"];
LAB: Node _ PrivateLookupNode["LAB"];
SAB: Node _ PrivateLookupNode["SAB"];
AReg0BA: Node _ PrivateLookupNode["AReg0BA"];
BReg0BA: Node _ PrivateLookupNode["BReg0BA"];
CReg0BA: Node _ PrivateLookupNode["CReg0BA"];
ASourceLtBA: Node _ PrivateLookupNode["ASourceLtBA"];
ASourceRtBA: Node _ PrivateLookupNode["ASourceRtBA"];
ASourceOffBA: Node _ PrivateLookupNode["ASourceOffBA"];
BSourceLtBA: Node _ PrivateLookupNode["BSourceLtBA"];
BSourceRtBA: Node _ PrivateLookupNode["BSourceRtBA"];
BSourceOffBA: Node _ PrivateLookupNode["BSourceOffBA"];
CSourceLtBA: Node _ PrivateLookupNode["CSourceLtBA"];
CSourceRtBA: Node _ PrivateLookupNode["CSourceRtBA"];
CSourceOffBA: Node _ PrivateLookupNode["CSourceOffBA"];
CRegIsField3B: Node _ PrivateLookupNode["CRegIsField3B"];
EUAluLeftSrc1B: Node _ PrivateLookupNode["EUAluLeftSrc1B"];
EUAluRightSrc1B: Node _ PrivateLookupNode["EUAluRightSrc1B"];
EUStore2ASrc1B: Node _ PrivateLookupNode["EUStore2ASrc1B"];
ARegIsC2BA: Node _ PrivateLookupNode["ARegIsC2BA"];
ARegIsC3BA: Node _ PrivateLookupNode["ARegIsC3BA"];
BRegIsC2BA: Node _ PrivateLookupNode["BRegIsC2BA"];
BRegIsC3BA: Node _ PrivateLookupNode["BRegIsC3BA"];
LoadStage1Ac: Node _ PrivateLookupNode["LoadStage1Ac"];
LoadStage1Bc: Node _ PrivateLookupNode["LoadStage1Bc"];
LoadStage2Ac: Node _ PrivateLookupNode["LoadStage2Ac"];
BubbleStage2A1BA: Node _ PrivateLookupNode["BubbleStage2A1BA"];
NormalStage2A1BA: Node _ PrivateLookupNode["NormalStage2A1BA"];
AbortStage2B2AB: Node _ PrivateLookupNode["AbortStage2B2AB"];
NormalStage2B2AB: Node _ PrivateLookupNode["NormalStage2B2AB"];
LoadStage3Ac: Node _ PrivateLookupNode["LoadStage3Ac"];
AbortStage3A2BA: Node _ PrivateLookupNode["AbortStage3A2BA"];
NormalStage3A2BA: Node _ PrivateLookupNode["NormalStage3A2BA"];
DPFaultB: Node _ PrivateLookupNode["DPFaultB"];
PhA: Node _ PrivateLookupNode["PhA"];
PhB: Node _ PrivateLookupNode["PhB"];
others: SymbolTable _ RoseCreate.GetOthers[otherss, "ABCFormation"];
NodeCreateHack1: PROC [name: ROPE] RETURNS [node: Node] = {node _ to.class.NodeInstance[erInstance: to.instance, name: name, type: NumTypes.NumType[8], other: RoseCreate.GetOther[others, name]]};
AReg1BA: Node _ NodeCreateHack1["AReg1BA"];
BReg1BA: Node _ NodeCreateHack1["BReg1BA"];
ARegAddr: Node _ NodeCreateHack1["ARegAddr"];
BRegAddr: Node _ NodeCreateHack1["BRegAddr"];
CRegAddr: Node _ NodeCreateHack1["CRegAddr"];
XRest: Node _ to.class.NodeInstance[erInstance: to.instance, name: "XRest", type: NumTypes.NumType[7], other: RoseCreate.GetOther[others, "XRest"]];
to.class.Equivalence[
to.instance,
NEW [NodeExpressionRep.primary _ [primary[XBus, [whole[]]]]],
NEW [NodeExpressionRep.catenate _ [catenate[LIST[
NEW [NodeExpressionRep.primary _ [primary[ARegAddr, [whole[]]]]],
NEW [NodeExpressionRep.primary _ [primary[BRegAddr, [whole[]]]]],
NEW [NodeExpressionRep.primary _ [primary[CRegAddr, [whole[]]]]],
NEW [NodeExpressionRep.primary _ [primary[CRegIsField3B, [whole[]]]]],
NEW [NodeExpressionRep.primary _ [primary[EUAluLeftSrc1B, [whole[]]]]],
NEW [NodeExpressionRep.primary _ [primary[EUAluRightSrc1B, [whole[]]]]],
NEW [NodeExpressionRep.primary _ [primary[EUStore2ASrc1B, [whole[]]]]]
]]]]
];
[] _ to.class.CellInstance[erInstance: to.instance, instanceName: "aFormation", typeName: "AFormation", other: RoseCreate.GetOther[others, "aFormation"], interfaceNodes: ""];
[] _ to.class.CellInstance[erInstance: to.instance, instanceName: "bFormation", typeName: "BFormation", other: RoseCreate.GetOther[others, "bFormation"], interfaceNodes: ""];
[] _ to.class.CellInstance[erInstance: to.instance, instanceName: "cFormation", typeName: "CFormation", other: RoseCreate.GetOther[others, "cFormation"], interfaceNodes: ""];
};

RegisterCells[];

END.

ÂIFUData2ABCImpl.Mesa
created by RoseTranslate 3.1.3 of September 5, 1985 12:14:34 pm PDT
created from IFUData2ABC.Rose of March 10, 1986 6:49:09 pm PST
created for McCreight.pa
created at March 10, 1986 7:03:18 pm PST
Signal Type decls
XBus _ BitOps.ICID[aPipe[1][b], XBus, 32, Dragon.aRegKBusPos, 8] };
XBus _ BitOps.ICID[bPipe[1][b], XBus, 32, Dragon.bRegKBusPos, 8] };
Pipe
XBus _ BitOps.ICID[cPipe[3][b], XBus, 32, Dragon.cRegKBusPos, 8];
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