DragomanTSetterRuns.mesa
Created by Pradeep Sindhu, October 20, 1985 0:11:19 am PDT
Pradeep Sindhu February 17, 1986 3:33:07 pm PST
Sweet October 25, 1985 4:13:33 pm PDT
DIRECTORY
AssociativeCache, CacheModels, Commander, Convert, DirectMapCache, Dragoman, Rope;
DragomanTSetterRuns: CEDAR PROGRAM
IMPORTS AssociativeCache, DirectMapCache, Commander, Dragoman, Rope
SHARES Dragoman =
BEGIN
TwoToTheTwo: PROC[n: INT] RETURNS[INT] = {
IF n=0 THEN RETURN[1] ELSE RETURN[2*TwoToTheTwo[n-1]]};
MarkTSetterGFIs: PROC [handle: Dragoman.Handle] = {
Dragoman.MarkGFI[handle, "TSetter", "TSetterStarter", "RemoteTSetter"];
Dragoman.MarkGFI[handle, "SirPressImpl", "PressPrinterImpl", "LFBoundingBoxImpl", "ComputeServerStubImpl"];
};
DragomanTSetterRunsGo: Commander.CommandProc = {
BEGIN
rc, mc: CacheModels.Cache;
handle: Dragoman.Handle ← Dragoman.Start[backingFile: Rope.Cat["SimTSetter.100.1.ts"], instr: 1, data: 1, traceOps: TRUE];
rc ← DirectMapCache.NewCache[lines: 512, quadsPerLine: 8]; -- real cache
mc ← AssociativeCache.NewCache[lines: 256, quadsPerLine: 4, wordsPerQuad: 1]; -- map cache
Dragoman.SetInstructionCache[handle: handle, number: 0, cache: AssociativeCache.NewCache[lines: 100, wordsPerQuad: 4, quadsPerLine: 1, lru: FALSE, realCache: rc, mapCache: mc]]; -- instruction cache
Dragoman.SetDataCache[handle: handle, number: 0, cache: AssociativeCache.NewCache[lines: 100, wordsPerQuad: 4, quadsPerLine: 1, lru: FALSE, realCache: rc, mapCache: mc]]; -- data cache
MarkTSetterGFIs[handle];
Dragoman.Run[handle, "DragomanStartTSetter Clover foo.tioga"];
rc.print[rc, handle.tsOut, "Real cache"];
mc.print[mc, handle.tsOut, "Map cache"];
Dragoman.End[handle];
END;
BEGIN
rc, mc: CacheModels.Cache;
handle: Dragoman.Handle ← Dragoman.Start[backingFile: Rope.Cat["SimTSetter.50.4.ts"], instr: 1, data: 1];
rc ← DirectMapCache.NewCache[lines: 512, quadsPerLine: 8]; -- real cache
mc ← AssociativeCache.NewCache[lines: 256, quadsPerLine: 4, wordsPerQuad: 1]; -- map cache
Dragoman.SetInstructionCache[handle: handle, number: 0, cache: AssociativeCache.NewCache[lines: 50, wordsPerQuad: 4, quadsPerLine: 4, lru: FALSE, realCache: rc, mapCache: mc]]; -- instruction cache
Dragoman.SetDataCache[handle: handle, number: 0, cache: AssociativeCache.NewCache[lines: 50, wordsPerQuad: 4, quadsPerLine: 4, lru: FALSE, realCache: rc, mapCache: mc]]; -- data cache
MarkTSetterGFIs[handle];
Dragoman.Run[handle, "WritePlain DragomanTSetterTest.tioga"] ;
rc.print[rc, handle.tsOut, "Real cache"];
mc.print[mc, handle.tsOut, "Map cache"];
Dragoman.End[handle];
END;
};
Commander.Register["DragomanTSetterRunsGo", DragomanTSetterRunsGo, "Starts a series of runs of Dragoman simulating TSetter"];
END.