DIRECTORY Atom, CD, CDSimpleRules, Core, CoreGeometry, CoreFlat, CoreOps, CoreProperties, CoreRoute, CoreRouteFlat, DABasics, DesignRules, FS, GC, GCHybrid, GCPrivate, IO, IP, IPBasicOps, IPCoTab, IPTop, IPTypeTab, Process, PW, PWCore, RefTab, Rope, Route, NewRouteTechnology, RouteDiGraph, SymTab; GCImpl: CEDAR PROGRAM IMPORTS Atom, CD, CDSimpleRules, CoreFlat, CoreOps, CoreProperties, CoreRoute, CoreRouteFlat, DesignRules, GC, GCHybrid, GCPrivate, IPBasicOps, IPTop, Process, PW, PWCore, RefTab, Rope, NewRouteTechnology, RouteDiGraph, SymTab EXPORTS GC = BEGIN Error: PUBLIC ERROR [errorType: GC.ErrorType _ callingError, explanation: Rope.ROPE _ NIL] = CODE; Signal: PUBLIC SIGNAL [signalType: GC.ErrorType _ callingError, explanation: Rope.ROPE _ NIL] = CODE; CreateDesignRules: PUBLIC PROC [technologyKey: ATOM, rulesKey: ATOM, horizLayer, vertLayer: Rope.ROPE] RETURNS [designRules: GC.DesignRules] = { rules: DesignRules.Rules _ DesignRules.GetRuleSet[rulesKey]; technology: CD.Technology _ rules.technology; hLayer: CD.Layer _ CDSimpleRules.GetLayer[technology.key, horizLayer]; vLayer: CD.Layer _ CDSimpleRules.GetLayer[technology.key, vertLayer]; designRules _ NEW[GC.DesignRulesRec _ [ horizLayer: horizLayer, vertLayer: vertLayer, horizParams: NewRouteTechnology.DesignRulesParameters[rules, hLayer, vLayer, horizontal], vertParams: NewRouteTechnology.DesignRulesParameters[rules, hLayer, vLayer, vertical], technology: technology]]; designRules.horizRules _ NewRouteTechnology.CmosDesignRules[rules, designRules.horizParams]; designRules.vertRules _ NewRouteTechnology.CmosDesignRules[rules, designRules.vertParams]}; defaultParms: PUBLIC GC.Parms _ NEW[GC.ParmsRec]; CreateContext: PUBLIC PROC [name: Rope.ROPE _ NIL, structure: CoreRouteFlat.Structure, designRules: GC.DesignRules, parms: GC.Parms] RETURNS [context: GC.Context] = { contextName: Rope.ROPE _ IF name # NIL THEN name ELSE structure.name; topology: IPTop.Ref _ IPTop.ReDefineChs [top: IPTop.CreateFromStructure[structure], maxChWidth: TRUE]; SetIPComps[structure, topology]; IPTop.Geometrize[topology]; context _ NEW[GC.ContextRec _ [name: contextName, rules: designRules, structure: structure, parms: parms, topology: topology, topologicalOrder: NIL]]}; DoInitialGlobalRoute: PUBLIC PROC [context: GC.Context, layoutStyle: GC.LayoutStyle] = { p: Process.Priority _ Process.GetPriority[]; Process.SetPriority[Process.priorityBackground]; GCPrivate.DoInitialGlobalRoute[context, layoutStyle]; Process.SetPriority[p]}; DoImproveGlobalRoute: PUBLIC PROC [context: GC.Context, layoutStyle: GC.LayoutStyle] = { p: Process.Priority _ Process.GetPriority[]; Process.SetPriority[Process.priorityBackground]; GCPrivate.DoImproveGlobalRoute[context, layoutStyle]; Process.SetPriority[p]}; DoDetailRoute: PUBLIC PROC [context: GC.Context, layoutStyle: GC.LayoutStyle] RETURNS [result: GC.Result] = { p: Process.Priority _ Process.GetPriority[]; Process.SetPriority[Process.priorityBackground]; result _ GCPrivate.DoDetailRoute[context, layoutStyle]; Process.SetPriority[p]}; InitialPlace: PUBLIC PROC [structure: CoreRouteFlat.Structure] ~ { FOR insts: LIST OF CoreRouteFlat.Instance _ structure.instances, insts.rest WHILE insts#NIL DO insts.first.placed _ TRUE ENDLOOP}; SetIPComps: PROC[structure: CoreRouteFlat.Structure, topology: IPTop.Ref] ~ { FOR insts: LIST OF CoreRouteFlat.Instance _ structure.instances, insts.rest WHILE insts#NIL DO IF insts.first#structure.outerInstance THEN { co: IPCoTab.Component _ NARROW[insts.first.any]; type: IPTypeTab.CoType _ co.type; size: IP.IntVector _ CD.InterestSize[insts.first.layObject]; shapeRec: REF IP.ShapeRep _ NEW[IP.ShapeRep _ [dim: IPBasicOps.NuNatVector[size.x, size.y]]]; co.shape _ shapeRec^; type.shapeInfo.shape _ shapeRec} ENDLOOP}; Destroy: PUBLIC PROC [context: GC.Context] ~ { DestroyNode: RouteDiGraph.EnumNodeProc = { channel: GCPrivate.Channel _ NARROW[node.nodeInfo]; channel.topoOrder _ NIL}; IPTop.DestroySelf[NARROW[context.topology]]; RouteDiGraph.DestroyGraph[graph: NARROW[context.topologicalOrder], enumNode: DestroyNode]; GCPrivate.DestroyChannels[context]}; Attributes: PWCore.AttributesProc = { structure: CoreRouteFlat.Structure _ CoreRouteFlat.FlattenToLayout[cellType, LIST[$w]]; CoreProperties.PutCellTypeProp[cellType, $GCStruc, structure]}; GCLayout: PWCore.LayoutProc = { name: Rope.ROPE _ CoreOps.GetCellTypeName[cellType]; hLayer: Rope.ROPE _ "metal"; vLayer: Rope.ROPE _ "metal2"; result: GC.Result; context: GC.Context; rules: GC.DesignRules; struc: CoreRouteFlat.Structure _ NARROW[CoreProperties.GetCellTypeProp[cellType, $GCStruc]]; prop: REF _ CoreProperties.GetCellTypeProp[cellType, $VerticalLayer]; IF prop#NIL THEN { name: IO.ROPE _ WITH prop SELECT FROM atom: ATOM => Atom.GetPName[atom], rope: IO.ROPE => rope, ENDCASE => ERROR; IF name.Find["2"]=-1 THEN {hLayer _ "metal2"; vLayer _ "metal"}}; rules _ GC.CreateDesignRules[$cmosB, $VTI, hLayer, vLayer]; GC.InitialPlace[struc]; context _ GC.CreateContext[name, struc, rules]; GC.DoInitialGlobalRoute[context, ic]; GC.DoImproveGlobalRoute[context, ic]; result _ GC.DoDetailRoute[context, ic]; RETURN[result.object]}; HybridLayout: PWCore.LayoutProc = { name: Rope.ROPE _ CoreOps.GetCellTypeName[cellType]; hLayer: Rope.ROPE _ "metal"; vLayer: Rope.ROPE _ "metal2"; result: GC.Result; context: GC.Context; rules: GC.DesignRules; struc: CoreRouteFlat.Structure _ NARROW[CoreProperties.GetCellTypeProp[cellType, $GCStruc]]; design: CD.Design _ PW.OpenDesign["SimpleBPCTest.dale"]; prop: REF _ CoreProperties.GetCellTypeProp[cellType, $VerticalLayer]; IF prop#NIL THEN { name: IO.ROPE _ WITH prop SELECT FROM atom: ATOM => Atom.GetPName[atom], rope: IO.ROPE => rope, ENDCASE => ERROR; IF name.Find["2"]=-1 THEN {hLayer _ "metal2"; vLayer _ "metal"}}; rules _ GC.CreateDesignRules[$cmosB, $Hybrid, hLayer, vLayer]; GCHybrid.DiddleCells[design, struc]; GC.InitialPlace[struc]; context _ GC.CreateContext[name, struc, rules]; GC.DoInitialGlobalRoute[context, hybrid]; GC.DoImproveGlobalRoute[context, hybrid]; result _ GC.DoDetailRoute[context, hybrid]; RETURN[result.object]}; Decorate: PWCore.DecorateProc = { CompareFlatInstances: PUBLIC CoreRoute.CompareFlatCTProc = { FOR insts: LIST OF CoreRouteFlat.Instance _ struc.instances.rest, insts.rest WHILE insts#NIL DO IF CoreFlat.FlatCellTypeEqualRec[insts.first.flatCell^, flatCT1] THEN RETURN[TRUE]; IF CoreFlat.FlatCellTypeEqualRec[insts.first.flatCell^, flatCT2] THEN RETURN[FALSE]; ENDLOOP; ERROR}; WireToLabels: PROC[wire: Core.Wire] RETURNS [labels: LIST OF Route.Label _ NIL] = { flatWire: CoreFlat.FlatWire = NARROW[RefTab.Fetch[struc.bindings, wire].val]; label: Route.Label = CoreRoute.LabelFlatWire[cellType, flatWire^]; auxLabels: LIST OF Rope.ROPE = NARROW[SymTab.Fetch[struc.auxLabels, label].val]; labels _ CONS [label, auxLabels]}; struc: CoreRouteFlat.Structure _ NARROW[CoreProperties.GetCellTypeProp[cellType, $GCStruc]]; CoreRoute.DecorateRoutedArea[ cellType: cellType, obj: obj, wireToLabels: WireToLabels, compareCT: CompareFlatInstances]}; HybridAtom: ATOM _ PWCore.RegisterLayoutAtom[$Hybrid, HybridLayout, Decorate, Attributes]; GlobalAtom: ATOM _ PWCore.RegisterLayoutAtom[$GC, GCLayout, Decorate, Attributes]; metalVerticalRules: PUBLIC GC.DesignRules _ CreateDesignRules[$cmosB, $Hybrid, "metal2", "metal"]; metalHorizontalRules: PUBLIC GC.DesignRules _ CreateDesignRules[$cmosB, $Hybrid, "metal", "metal2"]; interestingProperties: PUBLIC LIST OF ATOM _ NIL; -- props interesting to GC technologyKey: ATOM _ $cmosB; -- $cmosA or $cmosB END. GCImpl.mesa Copyright س 1986, 1987 by Xerox Corporation. All rights reserved. Bryan Preas, September 16, 1987 4:26:06 pm PDT Massoud Pedram July 8, 1988 4:32:04 pm PDT Don Curry December 7, 1987 11:27:08 am PST Errors Design Rules Define the general cell design rules. technologyKey values must correspond to one of the ChipNDale technologies. horizLayer, vertLayer should be "poly", "metal" or "metal2". General Cell Context and Result Create a General Cell context. The General Cell context definition includes the design rules (conductor and via widths and spacings) for the routing channels as well as the circuit structure definition. SetIPTypes[structure, topology]; Determine strategic paths for the wiring among the cells. Determine strategic paths for the wiring among the cells. Determine actual wiring paths. SetIPTypes: PROC[structure: CoreRouteFlat.Structure, topology: IPTop.Ref] ~ { EachTypeProc: CoreRouteFlat.EachObjectAction ~ { IF object.heirarchyLevel = this THEN { type: IPTypeTab.CoType _ IPTypeTab.FetchCoType[topology.types, object.name]; size: IP.IntVector _ CD.InterestSize[object.layObject]; shapeRec: REF IP.ShapeRep _ NEW[IP.ShapeRep _ [dim: IPBasicOps.NuNatVector[size.x, size.y]]]; type.shapeInfo _ [shapeRec, NIL, NIL]; }; }; --EachTypeProc [] _ CoreRouteFlat.EnumerateObjects[structure, EachTypeProc]; }; --SetIPTypes Clean Up Remove circular references so garbage collection can work Attributes, Layout and Decorate ($Hybrid, $GC) root is first instance in struc.instances Global Frame Variables ‌تƒکڑœ™JڑœB™BJڑœ+دkœ™/Jڑœ*™*Jڑœ*™*Jک—ڑ‌ ک Jڑ œ‌œw‌œ‌œ‌œ|ک Jک—ڑذbnœ‌œ‌œکJڑ‌œ‌œY‌œuکâJڑ‌œ‌œ‌ک—head™codeڑدnœ‌œ‌کLڑ œ‌œ-‌œ‌œ‌œکN—ڑںœ‌œ‌کLڑ œ ‌œ-‌œ‌œ‌œکO——™ڑںœ‌œ‌œ‌œ‌œ‌œ‌œ‌œکگLڑœ®™®LکLڑœ<کLڑœ$ک$Lڑ‌œکLڑœ ‌œ#ک/Lڑ‌œ'ک)Lڑ‌œ'ک)Lڑœ ‌œ ک+Lڑ‌œکLک—ڑںœک"ڑںœ‌œ ک