GC.mesa
Copyright Ó 1985, 1986, 1987 by Xerox Corporation. All rights reserved.
Last Edited by: Preas, September 16, 1987 4:27:50 pm PDT
Don Curry December 3, 1987 1:41:35 pm PST
Massoud Pedram November 9, 1987 12:52:49 pm PST
DIRECTORY
CD, Core, CoreGeometry, Rope, Route, DABasics, CoreRouteFlat;
GC: CEDAR DEFINITIONS = BEGIN
Theory
This interface defines the public data structures and operations to define a general cell object from a structure description.
Common Types
RopeList: TYPE = LIST OF Rope.ROPE;
Layer: TYPE = CD.Layer;
Rect: TYPE = DABasics.Rect;
RefRect: TYPE = REF Rect;
Pos: TYPE = DABasics.Position;
Number: TYPE = DABasics.Number;
SideOrNone: TYPE = DABasics.SideOrNone;
Side: TYPE = DABasics.Side;
Direction: TYPE = DABasics.Direction;
ConnectionStrength: TYPE ~ {goodInternal, power, highImpedance, none};
LayoutStyle: TYPE ~ {ic, hybrid};
Errors
Error: ERROR [errorType: ErrorType ← callingError, explanation: Rope.ROPE ← NIL];
Signal: SIGNAL [signalType: ErrorType ← callingError, explanation: Rope.ROPE ← NIL];
ErrorType: TYPE = {programmingError, callingError, noResource, designRuleViolation, other};
Design Rules
DesignRules: TYPE = REF DesignRulesRec;
DesignRulesRec:
TYPE =
RECORD[
horizLayer: Rope.ROPE,
vertLayer: Rope.ROPE,
horizParams: Route.DesignRulesParameters,
vertParams: Route.DesignRulesParameters,
horizRules: Route.DesignRules,
vertRules: Route.DesignRules,
technology: CD.Technology];
metalHorizontalRules: DesignRules; -- default design rules using $CmosB
metalVerticalRules: DesignRules;
-- default design rules using $CmosB
CreateDesignRules:
PROC[
technologyKey: ATOM,
rulesKey: ATOM,
horizLayer: Rope.ROPE,
vertLayer: Rope.
ROPE]
RETURNS[designRules: DesignRules];
Define the general cell design rules. technologyKey values must correspond to one of the ChipNDale technologies. horizLayer, vertLayer should be "poly", "metal" or "metal2".
Properties
interestingProperties: LIST OF ATOM; -- interesting to GC
General Cell Context and Result
defaultParms: Parms;
Parms: TYPE = REF ParmsRec;
ParmsRec:
TYPE =
RECORD [
opt: Route.Optimization ← full, -- controls runtime vs quality
signalSinglePinNets: BOOL ← TRUE]; -- SIGNAL if any single pin nets
The general cell router will signal if design rule violations are found in the input. Proceeding from the signals may cause design rule violations in the routing!! Setting the Signal Booleans to FALSE should be used with caution!!
Context: TYPE = REF ContextRec;
ContextRec:
TYPE =
RECORD [
name: Rope.ROPE ← NIL, -- name or the cell being constructed
rules: DesignRules ← NIL, -- widths and spacings to be used
structure: CoreRouteFlat.Structure ← NIL, -- structure specifications
parms: Parms ← NIL,
topology: REF ANY ← NIL, -- for internal use only
topologicalOrder: REF ANY ← NIL]; -- for internal use only
Result: TYPE = REF ResultRec;
ResultRec:
TYPE =
RECORD[
context: Context,
object: CD.Object,
polyLength: INT ← 0,
metalLength: INT ← 0,
metal2Length: INT ← 0,
polyToMetal: INT ← 0,
metalToMetal2: INT ← 0,
numIncompletes: INT ← 0,
incompleteNets: RopeList ← NIL];
CreateContext:
PROC[
name: Rope.ROPE ← NIL,
structure: CoreRouteFlat.Structure,
designRules: DesignRules ← metalHorizontalRules,
parms: Parms ← defaultParms]
RETURNS[context: Context];
Create a General Cell context. The General Cell context definition includes the design rules (conductor and via widths and spacings) for the routing channels as well as the circuit structure definition. See Structure for utilities to create a structure
InitialPlace:
PROC[structure: CoreRouteFlat.Structure];
temporary initial placement: read from a file
General Cell Optimization and Construction
The following operations are available for a standard cell design.
DoInitialGlobalRoute:
PROC[context: Context, layoutStyle: LayoutStyle];
Determine strategic paths for the wiring.
DoImproveGlobalRoute:
PROC[context: Context, layoutStyle: LayoutStyle];
Determine strategic paths for the wiring.
DoDetailRoute:
PROC[context: Context, layoutStyle: LayoutStyle]
RETURNS [result: Result];
Determine actual wiring paths. Create a ChipNDale object and include the placement and routing in the object.
Clean Up
Destroy:
PROC[context: Context];
Remove circular references so garbage collection can work
END.