Pad frame layout and routing addresses the problem of connecting the logic, or inner cell, of an integrated circuit through bonding pads to the environment. Three interrelated problems must be addressed together to solve this problem successfully:

This paper presents a new solution to pad frame layout and routing. The technique combines standard functions, such as channel and switchbox routers, to produce a general solution. This work builds on layout framework research at the Xerox Palo Alto Research Center [Barth-a].

Previously, pad frame layout has not been considered a separate topic. Typically, pad frame layout is performed in a pre-programmed fashion; the only options available to the circuit designer are those provided by the programmer. It is difficult for this options and parameters approach to meet the needs of modern VLSI circuits. The approach described here brings all the power of modern module generators within a layout framework.

Research into power distribution has focused on determining wiring topologies that allow power distribution on a single layer. This constraint originates from older technologies where only one level of good interconnection material (i.e. metal) was provided, or the desire to avoid voltage drops associated with the resistivity of vias between metal layers. [Zahir] provides the condition for the existence of planar routing for two nets (a cut set exists for the pins of the two nets on all of the cells). Most power routing algorithms assume this condition. For example, see [Rothermel, Xiong]. Recently Zahir's planarity condition has been bypassed by allowing multiple power pads and a forest of power supply nets [Haruyama] or loops [Dai].

However, large high-performance circuits dictate even more complex power supply topologies. Typical circuits now use tens of power pads, and the many modules that make out the inner cell have different power requirements. We believe that the power distribution scheme should not impose constraints on the individual modules: we have found that the most (area) efficient topology is a grid. Grid distribution topologies also tend to even out the peaks in current distribution but require two layers of interconnection. Thus, we must account for the extra resistance in wires caused by vias and must take precautions to insure highly reliable vias. Analysis of grid distribution topologies is difficult, but given the approximate nature of electromigration models and the difficulty in determining peak power supply currents (especially in large CMOS circuits), high accuracy is unnecessary, and a conservative approach is preferable.

Previous pad ring routing algorithms fall into two categories:

Both types have drawbacks which reduce routing efficiency and preclude the use of active cells. Furthermore, they require a routing model different from standard channel and switchbox routers. Thus, systems that use these algorithms cannot make use of highly developed channel and switchbox routers. This contrasts with our approach where the detailed router is used throughout the design system.

The remainder of this paper describes the new pad ring layout and routing approach. Section 2 describes the problem being solved while Section 3 provides an overview of the approach and discusses the division of the layout surface into routing areas. Section 4 describes the algorithms in detail, and Section 5 presents results for two typical circuits.

Pad layout and routing connects an inner cell to its external environment through bonding pads.

The physical layout of the inner cell and the bonding pads may be completed (the exact geometry is available) or the cells may be active [Preas]. (They can sense their environment and adjust their layout to suit.) An example of the utility of active cells is the ability to size the power busses according to the power supply current that must be fed through the cell. This means the layout must first be done topologically. Then the cells are sized, and finally, the geometric layout is performed.

The connectivity between the inner cell and the pad frame is specified by a structural description [Barth-b] while the connectivity within the cells is provided by the encompassing layout system. The connectivity within the cells is necessary since arbitrary layout synthesis tools may leave some nets disconnected and expect the pad frame router (the router of last resort) to connect any remaining disconnected wires. In particular, global nets such as power supply nets are often partially disconnected.

Typical input to the layout and routing program is a schematic such as Figure 1. Figures 2 shows the layout produced for this schematic.

The pad frame is constructed directly from the schematic description using module generators. The remainder of the layout surface is routing area and is divided as shown in Figure 3. The routing area closest to the inner cell is used for both signal and power nets, and routing is performed by channel and switchbox routers. The next outermost ring is devoted to busses that supply power to the inner cell and is constructed by module generators. Signal wiring that connects to the bonding pad on a side must cross the power bus modules. The outermost annular ring (typically 0 to 3 tracks thick) is routed by four channel router invocations (one for each side). This area is used to route to bonding pad pins within the shadow of power supply pins on the inner cell. Bonding pad pins that are not within a shadow are routed straight across these outer channels. If wiring is not required in any routing area, its size is automatically reduced to zero.

The top level algorithm is shown in Figure 4. These steps are described in the remainder of this section.

Global routing finds an assignment of wiring segments to signal routing areas (channels or switchboxes) that minimizes the area subject to constraints of connectivity and electrical characteristics (primarily wire widths). Wire widths are determined by properties of the nets or properties of the pins on the inner cell. The global router knows which pins are connected within the cells and exploits this information to improve the global routing. Power supply nets may be routed with the other signals (with wider wires, of course) as in Figure 5, or these nets may be connected directly across the signal channels to power busses as in Figure 2.

The general paradigm used in this design automation system is that schematics specify all aspects of the circuit, including the layout assembly [Barth-a]. Thus, the pad frame is not chosen from a few templates with some limited parameter selection: it is built from basic cells (i.e. pads) using all layout generators available within the framework. In simple cases (Figure 5), the pad frame is decomposed in (at most) four rows of pad, which are assembled by simple abutment of pads. We have also constructed double tier pad frames, which combine a row of signal pads, a row of power pads, and dedicated power busses (see Figure 2).

To prove how general this mechanism is, we have even constructed complex pads from a basic bare pad and standard cells; the construction of the pad frame thus involved the use a standard cell place-and-route system in addition to simpler operators like abutment or rotations.

For core-bound circuits, the pad rows are viewed as active cells, and are stretched and/or extended in order to match the inner cell.

These routing areas are constructed by module generators. The normal configuration is a double ring of metal where one ring carries Gnd and the other carries Vdd. Each ring is made of four segments with alternating materials, and on any given side, the segment for Gnd and the segment for Vdd use different materials. These choices are compatible with one horizontal material and one vertical material on the pins of the inner cell.

Power routing has priority over signal routing and is always done in a straight line; because of the choices made above, there is exactly one via between a power pin on the inner cell and a power pin on the pad frame.

Signals cross the first ring, then switch material with a via, then cross the second ring to reach the outer routing area. The external routing area is there only to insure that signals do not conflict with power taps in the power modules.

Notice that this scheme gives a lot of freedom to the pad frame and the inner cells. It is however restricted to two power supplies; more layers of interconnects would be needed to generalize this scheme to more power supplies.

An advantage of this approach is that only channel and switchbox routers are needed for detailed routing. These routers are well understood and produce very good routing [Deutsch]. Extensions are provided to guarantee completion in the presence of constraint loops and to allow pins at any location and wires of any width.

The pad frame layout and routing package has been in use at Xerox PARC for two years and has been used in a wide range of designs. Two radically different layouts are shown in Figures 2 and 5. Figure 5 shows a general cell layout in which the power nets are routed with the signal nets. Figure 2 shows a standard cell layout in which all the routing areas defined in Figure 3 are present.