-- BIC3.df -- Copyright Ó 1987, 1988 by Xerox Corporation. All rights reserved. -- Bus Interface Chip -- Louis Monier March 29, 1988 2:32:23 pm PST -- Last Edited by: Louis Monier August 18, 1988 11:37:18 am PDT -- The third version of the Bus Interface Chip, designed in March 1988 -- Only a minor tweak to the delay line Directory [Indigo]Top> BIC3.df 18-Aug-88 11:37:24 PDT Exports [Indigo]BIC3> -- Documentation BICDataSheetDoc.tioga!1 29-Mar-88 17:56:27 PST BIC.log!3 29-Jun-88 18:27:21 PDT BICDoc.tioga!1 06-Feb-88 20:52:16 PST BICPresentation.tioga!1 05-Feb-88 11:25:44 PST BICPresentation.dale!1 05-Feb-88 11:20:53 PST -- Layout Countdown.cm!3 29-Jun-88 15:18:12 PDT BIC.dale!2 30-Mar-88 18:10:01 PST BIC.core!3 29-Jun-88 15:50:05 PDT BICLayout.dale!3 29-Jun-88 15:52:02 PDT BICShell.dale!3 29-Jun-88 15:51:59 PDT LichenBICLibrary.cm!1 29-Apr-87 23:03:22 PDT -- Rosemary Simulation and testing on the IMS BIC.mesa!2 29-Mar-88 18:06:10 PST +BIC.bcd!2 30-Mar-88 12:04:45 PST BICImpl.mesa!3 29-Jun-88 22:53:33 PDT +BICImpl.bcd!4 29-Jun-88 22:54:27 PDT BIC.install!1 05-Oct-87 12:12:32 PDT BICTest.mesa!1 11-Feb-88 19:47:25 PST +BICTest.bcd!2 30-Mar-88 12:05:07 PST BICSim.mesa!2 30-Mar-88 17:02:07 PST +BICSim.bcd!2 30-Mar-88 17:02:23 PST BIC.wires!1 23-Sep-87 12:47:17 PDT BicIcPack.dale!1 17-Aug-88 09:46:01 PDT BicIcPack.pinCoords!1 17-Aug-88 09:46:42 PDT TestBIC.cm!2 30-Mar-88 16:42:09 PST Imports [DATools]Top>Core.df Of ~= Using [BitOps.bcd, Core.bcd, CoreClasses.bcd, CoreCreate.bcd, CoreFlat.bcd, CoreIO.bcd, CoreProperties.bcd] Imports [DATools]Top>ICTest.df Of ~= Using [ICTest.bcd, TestCable.bcd] Imports [DATools]Top>IMSTester.df Of ~= Using [IMSTester.bcd] Imports [DATools]Top>Rosemary.df Of ~= Using [Ports.bcd, Rosemary.bcd, RosemaryUser.bcd] Imports [Cedar]Top>IO.df Of ~= Using [IO.bcd] Imports [Cedar]Top>Rope.df Of ~= Using [Rope.bcd] Imports [Cedar]Top>TerminalIO.df Of ~= Using [TerminalIO.BCD]