Delay Lines
Each channel has three programmable delay lines,. The offset from the channel base address for a particular delay line is:
Delay Line offset = {0, 8, 16} for {Sample, Width, Delay} respectively
Each delay line in turn has seven registers to control the actual delay:
0: DSR0 - Delay shift register 0
1: DSR1 - Delay shift register 1
2: IC0 - Inverter chain 0
3: IC1 - Inverter chain 1
4: IC2 - Inverter chain 2
5: UpEdge
6: DnEdge
7: IOCtl
F: Format
Decompressor