DecoderArray:
PROC [n:
NAT, cx: Sisyph.Context]
RETURNS [ct: CellType] ~ {
dec0: CellType ← Sisyph.ES["Decode0.sch", cx];
dec1: CellType ← Sisyph.ES["Decode1.sch", cx];
decEn: CellType ← Sisyph.ES["DecodeEn.sch", cx];
decWDrive: CellType ← Sisyph.ES["WriteDrive.sch", cx];
decRDrive: CellType ← Sisyph.ES["ReadDrive.sch", cx];
decLeft: CellType ← Sisyph.ES["DecoderLeft.sch", cx];
a: NAT ← BitOps.NBits[n]; -- number of address bits
RA: Wire ← Seq["RA", a];
nRA: Wire ← Seq["nRA", a];
WA: Wire ← Seq["WA", a];
nWA: Wire ← Seq["nWA", a];
Rd: Wire ← Seq["Rd", n];
Wr: Wire ← Seq["Wr", n];
tileArray: TilingClass.TileArray ←
NEW[TilingClass.TileArrayRec[n]];
-- from the bottom up: rows 0, ... n-1
IF n=0 THEN ERROR; --Please specify the number of rows
FOR row:
NAT
IN [0..n)
DO
-- create the rows
tileArray[row] ← NEW[TilingClass.TileRowRec[2*a+4]];
ENDLOOP;
FOR row:
NAT
IN [0..n)
DO
tileArray[row][0] ←
NEW[TilingClass.TileRec ← [
type: decLeft, renaming: LIST[["Vdd", "Vdd"], ["Gnd", "Gnd"]] ]];
FOR i:
NAT
IN [0..a)
DO
-- column 0 is on the left
tileArray[row][i+1] ←
NEW[TilingClass.TileRec ← [
type: IF BitOps.EBFW[row, i, a] THEN dec1 ELSE dec0,
renaming: LIST[["Vdd", "Vdd"], ["Gnd", "Gnd"], ["A", RA[i]], ["nA", nRA[i]]]
]];
ENDLOOP;
tileArray[row][a+1] ←
NEW[TilingClass.TileRec ← [
type: decRDrive,
renaming: LIST[["Vdd", "Vdd"], ["Gnd", "Gnd"], ["out", Rd[row]]] ]];
tileArray[row][a+2] ←
NEW[TilingClass.TileRec ← [
type: decEn,
renaming: LIST[["Vdd", "Vdd"], ["Gnd", "Gnd"], ["wEn", "wEn"]] ]];
FOR i:
NAT
IN [0..a)
DO
-- column 0 is on the left
tileArray[row][i+a+3] ←
NEW[TilingClass.TileRec ← [
type: IF BitOps.EBFW[row, i, a] THEN dec1 ELSE dec0,
renaming: LIST[["Vdd", "Vdd"], ["Gnd", "Gnd"], ["A", WA[i]], ["nA", nWA[i]]]
]];
ENDLOOP;
tileArray[row][2*a+3] ←
NEW[TilingClass.TileRec ← [
type: decWDrive,
renaming: LIST[["Vdd", "Vdd"], ["Gnd", "Gnd"], ["out", Wr[row]], ["CK", "CK"]] ]];
ENDLOOP;
ct ← TilingClass.CreateTiling[
name: "DecoderArray",
public: Wires[nRA, RA, nWA, WA, "wEn", "CK", Rd, Wr, "Vdd", "Gnd"],
tileArray: tileArray,
neighborX: TilingClass.LayoutNeighborX,
neighborY: TilingClass.LayoutNeighborY
];
[] ← Rosemary.BindCellType[ct, "DPDecoderSeq"];
[] ← CoreFlat.CellTypeCutLabels[ct, "DPMacro"];
Ports.InitPorts[ct, l, none, "Vdd", "Gnd", "wEn", "CK"];
Ports.InitPorts[ct, ls, none, "nRA", "RA", "nWA", "WA"];
Ports.InitPorts[ct, ls, drive, "Rd", "Wr"];
};