DynMapCacheProg.mesa
Copyright Ó 1988 by Xerox Corporation. All rights reserved.
Created by Louis Monier, May 4, 1988 2:44:02 pm PDT
This module creates the Atom which contains the program for the DynaBus exerciser chip to send and receive DynaBus packets to test the display controller chip (DDC).
DIRECTORY
Atom, DynaBusInterface, Rope; 
DynMapCacheProg: CEDAR PROGRAM
IMPORTS Atom
EXPORTS
~ BEGIN
Quad: TYPE = DynaBusInterface.Quad;
Cmd: TYPE = DynaBusInterface.Cmd;
L: PROC [c: BOOL] RETURNS [rc: REF ANY] = {rc ← NEW[BOOL ← c]};
C: PROC [c: CARD] RETURNS [rc: REF ANY] = {rc ← NEW[CARD ← c]};
Q: PROC [c: Quad] RETURNS [rc: REF ANY] = {rc ← NEW[Quad ← c]};
Com: PROC [c: Cmd] RETURNS [rc: REF ANY] = {rc ← NEW[Cmd ← c]};
R: PROC [c: Rope.ROPE] RETURNS [rc: REF ANY] = {rc ← NEW[Rope.ROPE ← c]};
regAd: CARD = 0A080H;
aidR: NAT=0;
shP: NAT=1;
shM: NAT=2;
byP: NAT=3;
byM: NAT=4;
byB: NAT=5;
vpP: NAT=6;
vpM: NAT=7;
The Program Starts Here
Atom.PutProp[$Simul2Sender, $PKList, LIST[
$Init,
$StartStop,
$ReceiveAll,
LIST[$Wait, C[300]],  -- for waiting for DBus initialization
LIST[$IOWriteRqst,
Q[[ 0, 0, regAd, aidR ]],-- register
Q[[ 0, 0, 0,  13H ]]], -- data
$WaitMsgSent,
$WaitMsgReceived, -- echo of above $IOWriteRqst
$WaitReply, -- *************************************
LIST[$IOReadRqst,
Q[[ 0, 0, regAd, aidR ]]],-- register
$WaitMsgSent,
$WaitMsgReceived, -- echo of above $IOWriteRqst
$WaitReply, -- *************************************
LIST[$WaitIOReadRplyandCheck,  -- a RBRply occurs.
Q[[ 0, 0, regAd, aidR ]], -- address
Q[[ 0, 0, 0, 13H ]]], -- data
$Nop,
LIST[$Jump, $Nop]
]];
END.