LIST[$ClearFlag, $MemReady],

LIST[$ClearFlag, $LocShared],

$Init,

$StartStop,

$ReceiveAll,   

LIST[$WaitSync, $DBusReady], -- wait DBus ready

Initialize memory controller

LIST[$IOWrite0, C[1], L[TRUE], L[TRUE], C[0],C[28],C[28],C[28],C[22],C[22]],

$WaitMsgSent,

$WaitMsgReceived, -- for the Echo

$WaitReply,

LIST[$IOWrite1, C[1],C[10],C[0],C[0]],

$WaitMsgSent,

$WaitMsgReceived, -- for the Echo

$WaitReply,

LIST[$IOWrite2, C[1],C[10],C[0]],

$WaitMsgSent,

$WaitMsgReceived, -- for the Echo

$WaitReply,

LIST[$WriteBlockRqst, Q[[0,0,0011H,2288H]],Q[[0,0,0123H,4567H]],Q[[1,1,1,1]],Q[[2,2,2,2]],Q[[3,3,3,3]]],

$WaitMsgSent,

LIST[$SetFlag, $MemReady], 

First lets pretend to be a Map Cache for one time

$WaitMapRqst,   -- first testing in Kernel mode 

LIST[$MapReply, C[0FH]], -- UserR enabled, UserW enabled, KernelW enabled, Dirty,

 

LIST[$WaitSync, $WriteDone],

Now lets pretend to be a Cache reading a word,

LIST[$ReadBlockRqst, Q[[0,0,0011H,2288H]]],

$WaitMsgSent,

$WaitMsgReceived, -- for the Echo

LIST[$WaitReadBlockRplyandCheck, Q[[0,0,0011H,2233H]],Q[[1,1,1,1]],Q[[2,2,2,2]],Q[[3,3,3,3]]],

LIST[$SetFlag, $LocShared],

 

Now wait CondWriteSingle on the Bus

LIST[$WaitCondWriteSingleRqstAndCheck, Q[[0,0,0011H,2289H]],Q[[0011H,2233H,0ABCH,0DEF9H]]],

LIST[$WaitCondWriteSingleRplyAndCheck, Q[[0,0,0011H,2289H]],Q[[0011H,2233H,0ABCH,0DEF9H]]],

Now lets pretend to be a Map Cache

LIST[$Wait, C[20]],

$StopSimul,

$Loop,

$WaitMapRqst,  

LIST[$MapReply, C[0FH]],

LIST[$Jump, $Loop]

]];