DIRECTORY FS, IO, Rope, Convert, BitOps; Gen4Impl: CEDAR PROGRAM IMPORTS FS, IO, Rope, Convert, BitOps ~ BEGIN outf: IO.STREAM; lineCount : CARD; nr:INT = 7; --number of colums in the right side of the line nl:INT = 7; --number of colums in the left side of the line NbRight : TYPE = [0..nr); NbLeft : TYPE = [0..nl); RightLine: TYPE = ARRAY NbRight OF Rope.ROPE; LeftLine: TYPE = ARRAY NbLeft OF Rope.ROPE; rl: RightLine; ll: LeftLine; comment: Rope.ROPE; Signal : TYPE = {T,F,X}; nDSerialOut,MDSerialIn,MDExecute,MDAddress : Signal; MDShiftCK,MnFreeze,MnDReset : Signal; MDSerialOut,nDSerialIn,nDExecute,nDAddress : Signal; nDShiftClock,DFreeze,DReset : Signal; Init: PROC [] RETURNS [] ~ { nDSerialOut _ F; MDSerialIn _ F; MDExecute _ F; MDAddress _ F; MDShiftCK _ F; MnFreeze _ F; MnDReset _ F; MDSerialOut _ X; nDSerialIn _ X; nDExecute _ X; nDAddress _ X; nDShiftClock _ X; DFreeze _ X; DReset _ X; }; RopeFromSignal: PROC [s: Signal] RETURNS [r: Rope.ROPE] ~ { SELECT s FROM F => r _ "0"; T => r _ "1"; ENDCASE => r _ "X"; }; Inv: PROC [s: Signal] RETURNS [t: Signal] ~ { SELECT s FROM F => t _ T; T => t _ F; ENDCASE => t _ X; }; MergeOut: PROC [] RETURNS [] ~ { column : INT; r : Rope.ROPE; r _ " "; FOR column IN [0..nl) DO r _ Rope.Cat[r,ll[column]," "]; ENDLOOP; r _ Rope.Cat[r," | "]; FOR column IN [0..nr) DO r _ Rope.Cat[r,rl[column]," "]; ENDLOOP; outf.PutF["%g -- %g %g \n",IO.rope[r],IO.rope[Convert.RopeFromInt[lineCount]],IO.rope[comment]]; comment _ "" }; Send: PROC [] RETURNS [] ~ { nDSerialIn _ Inv[MDSerialIn]; nDExecute _ Inv[MDExecute]; nDAddress _ Inv[MDAddress]; nDShiftClock _ Inv[MDShiftCK]; DFreeze _ Inv[MnFreeze]; DReset _ Inv[MnDReset]; ll[0] _ RopeFromSignal[nDSerialOut]; ll[1] _ RopeFromSignal[MDSerialIn]; ll[2] _ RopeFromSignal[MDExecute]; ll[3] _ RopeFromSignal[MDAddress]; ll[4] _ RopeFromSignal[MDShiftCK]; ll[5] _ RopeFromSignal[MnFreeze]; ll[6] _ RopeFromSignal[MnDReset]; rl[0] _ RopeFromSignal[MDSerialOut]; rl[1] _ RopeFromSignal[nDSerialIn]; rl[2] _ RopeFromSignal[nDExecute]; rl[3] _ RopeFromSignal[nDAddress]; rl[4] _ RopeFromSignal[nDShiftClock]; rl[5] _ RopeFromSignal[DFreeze]; rl[6] _ RopeFromSignal[DReset]; MergeOut; lineCount _ lineCount+ 1; }; SendAddress: PROC [address: CARDINAL] RETURNS [] ~ { adrs: CARDINAL _ address; s: INT; MDAddress _ T; MDSerialOut _ X; FOR s IN [0..16) DO MDShiftCK _ F; IF (BitOps.WShift[adrs,s-15] MOD 2) = 0 THEN MDSerialIn _ F ELSE MDSerialIn _ T; Send; MDShiftCK _ T; Send; ENDLOOP; MDAddress _ F; MDShiftCK _ F; Send; }; ReadandCheck: PROC [v: CARD, c: INT _ 16] RETURNS [] ~ { s: INT; value: CARD _ v; MDAddress _ F; MDShiftCK _ F; IF (BitOps.WShift[value,1-c] MOD 2) = 0 THEN MDSerialOut _ F ELSE MDSerialOut _ T; Send; FOR s IN [1..c) DO MDShiftCK _ T; IF (BitOps.WShift[value,s-c+1] MOD 2) = 0 THEN MDSerialOut _ F ELSE MDSerialOut _ T; Send; MDShiftCK _ F; Send; ENDLOOP; }; outf _ FS.StreamOpen["///Chip/BackLinkDBus1.oracle", $create]; outf.PutF["-- Test D-Bus for Oracle\n"]; outf.PutF[" \n"]; outf.PutF["-- Output :\n"]; outf.PutF["-- nDSerialOut: A, MDSerialIn: B, MDExecute: C, MDAddress: D, \n"]; outf.PutF["-- MDShiftCK: E,MnFreeze: F, MnDReset:G\n"]; outf.PutF["-- Input :\n"]; outf.PutF["-- MDSerialOut:M, nDSerialIn:N, nDExecute:O, nDAddress:P, \n"]; outf.PutF["-- nDShiftClock:Q, DFreeze:R,DReset:S,\n"]; outf.PutF[" \n"]; outf.PutF["-- A B C D E F G ~ M N O P Q R S \n"]; outf.PutF["\n"]; lineCount_ 0; Init; Send; comment _ "Address of the Arbiter 0 ID path"; SendAddress[0]; comment _ "ID of the Arbiter type:1, Version 5"; ReadandCheck[5045H]; comment _ "Address of the Arbiter 1 ID path"; SendAddress[2000H]; comment _ "ID of the Arbiter type:1, Version 3"; ReadandCheck[5043H]; comment _ "Address of the BIC 0 ID path"; SendAddress[0100H]; comment _ "ID of BIC type 2, Version 8"; ReadandCheck[5088H]; comment _ "Address of the BIC 1 ID path"; SendAddress[0120H]; comment _ "ID of BIC type 2, Version 9"; ReadandCheck[5089H]; comment _ "Address of the BIC 2 ID path"; SendAddress[0140H]; comment _ "ID of BIC type 2, Version 10"; ReadandCheck[508AH]; comment _ "Address of the BIC 3 ID path"; SendAddress[0160H]; comment _ "ID of BIC type 2, Version 11"; ReadandCheck[508BH]; comment _ "Address of the BIC 4 ID path"; SendAddress[0180H]; comment _ "ID of BIC type 2, Version 12"; ReadandCheck[508CH]; comment _ "Address of the BIC 5 ID path"; SendAddress[01A0H]; comment _ "ID of BIC type 2, Version 13"; ReadandCheck[508DH]; comment _ "Address of the BIC 6 ID path"; SendAddress[01C0H]; comment _ "ID of BIC type 2, Version 14"; ReadandCheck[508EH]; outf.PutF[". \n"]; -- end outf.Close[]; END. ΔGen4Impl.mesa Copyright Σ 1987 by Xerox Corporation. All rights reserved. Jean Gastinel September 8, 1987 4:33:20 pm PDT Oracle Generation for the DBus Special variables of the Debug-Bus Convert a signal {F,T,X} into the corresponding Rope {0,1,X} t gets the invert of s This proc merge into two Rope Right and Left different elements of the line and write the result in the output stream This Proc convert the variables into ropes rl[i] & ll[i] for generating the line then call MergeOut for writing the line This Proc send an address on the DebugBus Reading of a path with c transitions of ShiftCK Start of the Program Here the program start : Create or Append the file Start Generation : Κ>˜codešœ ™ Kšœ<™Kšœ  œ œ˜)Kšœ  œ˜Kšœ   œ˜Kšœ  >œ˜NKšœ  œ $œ˜7Kšœ   œ˜Kšœ  œ 7œ˜JKšœ  œ #œ˜6Kšœ  œ˜Kšœ  œ "œ˜5Kšœ˜K˜K˜K˜K™K™Kšœ ˜ K˜K˜Kšœ.˜.Kšœ˜Kšœ0˜0Kšœ˜Kšœ.˜.Kšœ˜Kšœ0˜0Kšœ˜Kšœ)˜)Kšœ˜Kšœ(˜(K˜Kšœ)˜)Kšœ˜Kšœ(˜(K˜Kšœ)˜)Kšœ˜Kšœ)˜)K˜Kšœ)˜)Kšœ˜Kšœ)˜)K˜Kšœ)˜)Kšœ˜Kšœ)˜)K˜Kšœ)˜)Kšœ˜Kšœ)˜)K˜Kšœ)˜)Kšœ˜Kšœ)˜)K˜K˜Kšœ  œŸ˜Kšœ ˜ K˜—Kšœ˜—…—BD