0 0 0 0 0 0 0 | 1 1 1 1 1 1 1 -- Test of the transmission of the DBus: 0 0 0 0 0 0 1 | 1 1 1 1 1 1 0 -- 0 0 0 0 0 1 0 | 1 1 1 1 1 0 1 -- After the selection by the Arbiter 0 0 0 0 0 1 1 | 1 1 1 1 1 0 0 -- of a device external of the board, the 0 0 0 0 1 0 0 | 1 1 1 1 0 1 1 -- transmission of all the bits are tested 0 0 0 0 1 0 1 | 1 1 1 1 0 1 0 -- Inputs B,C,D,E,F,G are from the Master 0 0 0 0 1 1 0 | 1 1 1 1 0 0 1 -- of the D-Bus and we check that we find 0 0 0 0 1 1 1 | 1 1 1 1 0 0 0 -- them inversed on the local Bus. 0 0 0 1 0 0 0 | 1 1 1 0 1 1 1 -- Same thing from the local Bus for SerialOut 0 0 0 1 0 0 1 | 1 1 1 0 1 1 0 -- (A) that we read inversed on the master 0 0 0 1 0 1 0 | 1 1 1 0 1 0 1 -- side (M) 0 0 0 1 0 1 1 | 1 1 1 0 1 0 0 0 0 0 1 1 0 0 | 1 1 1 0 0 1 1 0 0 0 1 1 0 1 | 1 1 1 0 0 1 0 0 0 0 1 1 1 0 | 1 1 1 0 0 0 1 0 0 0 1 1 1 1 | 1 1 1 0 0 0 0 0 0 1 0 0 0 0 | 1 1 0 1 1 1 1 0 0 1 0 0 0 1 | 1 1 0 1 1 1 0 0 0 1 0 0 1 0 | 1 1 0 1 1 0 1 0 0 1 0 0 1 1 | 1 1 0 1 1 0 0 0 0 1 0 1 0 0 | 1 1 0 1 0 1 1 0 0 1 0 1 0 1 | 1 1 0 1 0 1 0 0 0 1 0 1 1 0 | 1 1 0 1 0 0 1 0 0 1 0 1 1 1 | 1 1 0 1 0 0 0 0 0 1 1 0 0 0 | 1 1 0 0 1 1 1 0 0 1 1 0 0 1 | 1 1 0 0 1 1 0 0 0 1 1 0 1 0 | 1 1 0 0 1 0 1 0 0 1 1 0 1 1 | 1 1 0 0 1 0 0 0 0 1 1 1 0 0 | 1 1 0 0 0 1 1 0 0 1 1 1 0 1 | 1 1 0 0 0 1 0 0 0 1 1 1 1 0 | 1 1 0 0 0 0 1 0 0 1 1 1 1 1 | 1 1 0 0 0 0 0 0 1 0 0 0 0 0 | 1 0 1 1 1 1 1 0 1 0 0 0 0 1 | 1 0 1 1 1 1 0 0 1 0 0 0 1 0 | 1 0 1 1 1 0 1 0 1 0 0 0 1 1 | 1 0 1 1 1 0 0 0 1 0 0 1 0 0 | 1 0 1 1 0 1 1 0 1 0 0 1 0 1 | 1 0 1 1 0 1 0 0 1 0 0 1 1 0 | 1 0 1 1 0 0 1 0 1 0 0 1 1 1 | 1 0 1 1 0 0 0 0 1 0 1 0 0 0 | 1 0 1 0 1 1 1 0 1 0 1 0 0 1 | 1 0 1 0 1 1 0 0 1 0 1 0 1 0 | 1 0 1 0 1 0 1 0 1 0 1 0 1 1 | 1 0 1 0 1 0 0 0 1 0 1 1 0 0 | 1 0 1 0 0 1 1 0 1 0 1 1 0 1 | 1 0 1 0 0 1 0 0 1 0 1 1 1 0 | 1 0 1 0 0 0 1 0 1 0 1 1 1 1 | 1 0 1 0 0 0 0 0 1 1 0 0 0 0 | 1 0 0 1 1 1 1 0 1 1 0 0 0 1 | 1 0 0 1 1 1 0 0 1 1 0 0 1 0 | 1 0 0 1 1 0 1 0 1 1 0 0 1 1 | 1 0 0 1 1 0 0 0 1 1 0 1 0 0 | 1 0 0 1 0 1 1 0 1 1 0 1 0 1 | 1 0 0 1 0 1 0 0 1 1 0 1 1 0 | 1 0 0 1 0 0 1 0 1 1 0 1 1 1 | 1 0 0 1 0 0 0 0 1 1 1 0 0 0 | 1 0 0 0 1 1 1 0 1 1 1 0 0 1 | 1 0 0 0 1 1 0 0 1 1 1 0 1 0 | 1 0 0 0 1 0 1 0 1 1 1 0 1 1 | 1 0 0 0 1 0 0 0 1 1 1 1 0 0 | 1 0 0 0 0 1 1 0 1 1 1 1 0 1 | 1 0 0 0 0 1 0 0 1 1 1 1 1 0 | 1 0 0 0 0 0 1 0 1 1 1 1 1 1 | 1 0 0 0 0 0 0 1 0 0 0 0 0 0 | 0 1 1 1 1 1 1 1 0 0 0 0 0 1 | 0 1 1 1 1 1 0 1 0 0 0 0 1 0 | 0 1 1 1 1 0 1 1 0 0 0 0 1 1 | 0 1 1 1 1 0 0 1 0 0 0 1 0 0 | 0 1 1 1 0 1 1 1 0 0 0 1 0 1 | 0 1 1 1 0 1 0 1 0 0 0 1 1 0 | 0 1 1 1 0 0 1 1 0 0 0 1 1 1 | 0 1 1 1 0 0 0 1 0 0 1 0 0 0 | 0 1 1 0 1 1 1 1 0 0 1 0 0 1 | 0 1 1 0 1 1 0 1 0 0 1 0 1 0 | 0 1 1 0 1 0 1 1 0 0 1 0 1 1 | 0 1 1 0 1 0 0 1 0 0 1 1 0 0 | 0 1 1 0 0 1 1 1 0 0 1 1 0 1 | 0 1 1 0 0 1 0 1 0 0 1 1 1 0 | 0 1 1 0 0 0 1 1 0 0 1 1 1 1 | 0 1 1 0 0 0 0 1 0 1 0 0 0 0 | 0 1 0 1 1 1 1 1 0 1 0 0 0 1 | 0 1 0 1 1 1 0 1 0 1 0 0 1 0 | 0 1 0 1 1 0 1 1 0 1 0 0 1 1 | 0 1 0 1 1 0 0 1 0 1 0 1 0 0 | 0 1 0 1 0 1 1 1 0 1 0 1 0 1 | 0 1 0 1 0 1 0 1 0 1 0 1 1 0 | 0 1 0 1 0 0 1 1 0 1 0 1 1 1 | 0 1 0 1 0 0 0 1 0 1 1 0 0 0 | 0 1 0 0 1 1 1 1 0 1 1 0 0 1 | 0 1 0 0 1 1 0 1 0 1 1 0 1 0 | 0 1 0 0 1 0 1 1 0 1 1 0 1 1 | 0 1 0 0 1 0 0 1 0 1 1 1 0 0 | 0 1 0 0 0 1 1 1 0 1 1 1 0 1 | 0 1 0 0 0 1 0 1 0 1 1 1 1 0 | 0 1 0 0 0 0 1 1 0 1 1 1 1 1 | 0 1 0 0 0 0 0 1 1 0 0 0 0 0 | 0 0 1 1 1 1 1 1 1 0 0 0 0 1 | 0 0 1 1 1 1 0 1 1 0 0 0 1 0 | 0 0 1 1 1 0 1 1 1 0 0 0 1 1 | 0 0 1 1 1 0 0 1 1 0 0 1 0 0 | 0 0 1 1 0 1 1 1 1 0 0 1 0 1 | 0 0 1 1 0 1 0 1 1 0 0 1 1 0 | 0 0 1 1 0 0 1 1 1 0 0 1 1 1 | 0 0 1 1 0 0 0 1 1 0 1 0 0 0 | 0 0 1 0 1 1 1 1 1 0 1 0 0 1 | 0 0 1 0 1 1 0 1 1 0 1 0 1 0 | 0 0 1 0 1 0 1 1 1 0 1 0 1 1 | 0 0 1 0 1 0 0 1 1 0 1 1 0 0 | 0 0 1 0 0 1 1 1 1 0 1 1 0 1 | 0 0 1 0 0 1 0 1 1 0 1 1 1 0 | 0 0 1 0 0 0 1 1 1 0 1 1 1 1 | 0 0 1 0 0 0 0 1 1 1 0 0 0 0 | 0 0 0 1 1 1 1 1 1 1 0 0 0 1 | 0 0 0 1 1 1 0 1 1 1 0 0 1 0 | 0 0 0 1 1 0 1 1 1 1 0 0 1 1 | 0 0 0 1 1 0 0 1 1 1 0 1 0 0 | 0 0 0 1 0 1 1 1 1 1 0 1 0 1 | 0 0 0 1 0 1 0 1 1 1 0 1 1 0 | 0 0 0 1 0 0 1 1 1 1 0 1 1 1 | 0 0 0 1 0 0 0 1 1 1 1 0 0 0 | 0 0 0 0 1 1 1 1 1 1 1 0 0 1 | 0 0 0 0 1 1 0 1 1 1 1 0 1 0 | 0 0 0 0 1 0 1 1 1 1 1 0 1 1 | 0 0 0 0 1 0 0 1 1 1 1 1 0 0 | 0 0 0 0 0 1 1 1 1 1 1 1 0 1 | 0 0 0 0 0 1 0 1 1 1 1 1 1 0 | 0 0 0 0 0 0 1 1 1 1 1 1 1 1 | 0 0 0 0 0 0 0 . & BackLinkDBus.oracle Test D-Bus for Oracle Output : nDSerialOut: A, MDSerialIn: B, MDExecute: C, MDAddress: D, MDShiftCK: E, MnFreeze: F, MnDReset:G, Input : MDSerialOut:M, nDSerialIn:N, nDExecute:O, nDAddress:P, nDShiftClock:Q, DFreeze:R, DReset:S, A B C D E F G | M N O P Q R S ĘT˜J˜JšœĎfü™ýJ™Jš ™ Jš‡$˜‡$Jšœ˜Jšœ˜Jš˜—…—Œ