<> <> <> <<>> <<>> DIRECTORY Basics,Dyn,Ports,SimulSender; SimulSenderImpl: CEDAR PROGRAM IMPORTS Ports,Basics EXPORTS SimulSender ~ BEGIN <> SendBus: PUBLIC PROC [dynaport: Dyn.DynaPortState] RETURNS [] ~ { WordAsBits: TYPE = PACKED ARRAY [0..16) OF BOOL; DWAsBits: TYPE = PACKED ARRAY [0..32) OF BOOL; <> <<>> <<>> NextLine: PROC [] RETURNS [] ~ { dynaport.labelcycle _ dynaport.labelcycle + 1; dynaport.countcycle _ 0; }; Jump: PROC [lnb:NAT] RETURNS [] ~ { <> dynaport.labelcycle _ lnb; }; Wait: PROC [countcycle: NAT] RETURNS [] ~ { <> IF dynaport.countcycle < countcycle THEN dynaport.countcycle _ dynaport.countcycle + 1 ELSE { dynaport.countcycle _ 0; NextLine }; }; Init: PROC [] RETURNS [] ~ { <> Ports.LCToLS[0,dynaport.rqlar]; dynaport.send _ L; dynaport.ttop _ L; Ports.LCToLS[0,dynaport.alpha]; Ports.LCToLS[1,dynaport.beta]; Ports.LCToLS[2,dynaport.gama]; Ports.LCToLS[3,dynaport.delta]; Ports.LCToLS[4,dynaport.epsilon]; IF dynaport.countcycle<4 THEN { dynaport.countcycle _ dynaport.countcycle+1; dynaport.load _ H } ELSE { dynaport.countcycle _ 0; dynaport.load _ L ; NextLine }; }; StartStop: PROC [] RETURNS [] ~ { SELECT dynaport.countcycle FROM <5 => { dynaport.ttop _ L; dynaport.countcycle _ dynaport.countcycle+1; dynaport.load_ H }; IN [5..10] => { dynaport.ttop _ H; dynaport.countcycle _ dynaport.countcycle+1; dynaport.load_ H }; ENDCASE => { dynaport.ttop _ L; dynaport.load _ L; NextLine }; }; MergeCom: PROC [cmd: NAT, deviceId: NAT, adrs: CARD] RETURNS [] ~ { <> <<>> cmdbits: WordAsBits _ LOOPHOLE[cmd]; deviceIdbits: WordAsBits _ LOOPHOLE[deviceId]; adrsbits: DWAsBits _ LOOPHOLE[Basics.SwapHalves[LOOPHOLE[adrs]]]; <<>> dynaport.alpha[0] _ H; -- For the Header dynaport.alpha[1] _ L; -- For the Parity dynaport.alpha[2] _ L; -- For Spare dynaport.alpha[3] _ L; -- For Spare FOR bit: INT IN [4..9) DO dynaport.alpha[bit] _ Ports.ToLevel[cmdbits[bit-4]]; ENDLOOP; dynaport.alpha[9] _ L; -- For the Mode/Fault dynaport.alpha[10] _ L; -- For Rply/Shared FOR bit: INT IN [11..21) DO dynaport.alpha[bit] _ Ports.ToLevel[deviceIdbits[bit-11]]; ENDLOOP; FOR bit: INT IN [21..36) DO dynaport.alpha[bit] _ L; ENDLOOP; FOR bit: INT IN [36..68) DO dynaport.alpha[bit] _ Ports.ToLevel[adrsbits[bit-36]]; ENDLOOP; }; ReadMemory: PROC [address: CARD] RETURNS [] ~ { <> <<>> readBlockRequest:NAT =00000; << >> Ports.LCToLS[16,dynaport.rqlar]; -- set mode "10000", length 2, low priority MergeCom[cmd: readBlockRequest, deviceId: 0, adrs: address]; SELECT
dynaport.countcycle FROM 0,1 => { dynaport.countcycle _ dynaport.countcycle+1; dynaport.send _ H; dynaport.load _ H; }; 2,3 => { dynaport.countcycle _ dynaport.countcycle+1; dynaport.send _ L }; ENDCASE => {dynaport.countcycle _ dynaport.countcycle+1; dynaport.load _ L; NextLine }; }; <> <<>> SendType1: PUBLIC PROC [] RETURNS [] ~ { <> <<>> Unknowncycle:ERROR = CODE; <<>> SELECT dynaport.labelcycle FROM 0 => Init; 1 => StartStop; 2 => ReadMemory[address: 01234567H]; 3 => Wait[10]; 4 => Jump[2]; ENDCASE => ERROR Unknowncycle; }; <<>> <> <> <<>> InvalidIns:ERROR = CODE; <<>> SELECT dynaport.param.ins FROM 1 => SendType1[]; ENDCASE => ERROR InvalidIns; }; <<>> END. <<>> <<>> <<>>