SimulSenderImpl.mesa
Copyright Ó 1987 by Xerox Corporation. All rights reserved.
Created by Jean Gastinel, October 23, 1987 5:59:56 pm PDT
DIRECTORY
Basics,Dyn,Ports,SimulSender;
SimulSenderImpl: CEDAR PROGRAM
IMPORTS Ports,Basics
EXPORTS SimulSender
~ BEGIN
Simulation Procs
SendBus: PUBLIC PROC [dynaport: Dyn.DynaPortState] RETURNS [] ~ {
WordAsBits: TYPE = PACKED ARRAY [0..16) OF BOOL;
DWAsBits: TYPE = PACKED ARRAY [0..32) OF BOOL;
Service Procs
NextLine: PROC [] RETURNS [] ~ {
dynaport.labelcycle ← dynaport.labelcycle + 1;
dynaport.countcycle ← 0;
};
Jump: PROC [lnb:NAT] RETURNS [] ~ {
Jump to cycle line number : lnb
dynaport.labelcycle ← lnb;
};
Wait: PROC [countcycle: NAT] RETURNS [] ~ {
This proc count "countcycle" cycle before going to the next instruction
IF dynaport.countcycle < countcycle THEN dynaport.countcycle ← dynaport.countcycle + 1
ELSE {
dynaport.countcycle ← 0;
NextLine };
};
Init: PROC [] RETURNS [] ~ {
This proc initialise the dynaport
Ports.LCToLS[0,dynaport.rqlar];
dynaport.send ← L;
dynaport.ttop ← L;
Ports.LCToLS[0,dynaport.alpha];
Ports.LCToLS[1,dynaport.beta];
Ports.LCToLS[2,dynaport.gama];
Ports.LCToLS[3,dynaport.delta];
Ports.LCToLS[4,dynaport.epsilon];
IF dynaport.countcycle<4 THEN
{ dynaport.countcycle ← dynaport.countcycle+1;
dynaport.load ← H }
ELSE
{ dynaport.countcycle ← 0;
dynaport.load ← L ;
NextLine
};
};
StartStop: PROC [] RETURNS [] ~ {
SELECT dynaport.countcycle FROM
<5 => {
dynaport.ttop ← L; dynaport.countcycle ← dynaport.countcycle+1;
dynaport.load← H };
IN [5..10] => {
dynaport.ttop ← H; dynaport.countcycle ← dynaport.countcycle+1;
dynaport.load← H };
ENDCASE => {
dynaport.ttop ← L;
dynaport.load ← L;
NextLine };
};
MergeCom: PROC [cmd: NAT, deviceId: NAT, adrs: CARD] RETURNS [] ~ {
This is the Proc which compute the command
cmdbits: WordAsBits ← LOOPHOLE[cmd];
deviceIdbits: WordAsBits ← LOOPHOLE[deviceId];
adrsbits: DWAsBits ← LOOPHOLE[Basics.SwapHalves[LOOPHOLE[adrs]]];
dynaport.alpha[0] ← H; -- For the Header
dynaport.alpha[1] ← L; -- For the Parity
dynaport.alpha[2] ← L; -- For Spare
dynaport.alpha[3] ← L; -- For Spare
FOR bit: INT IN [4..9) DO
dynaport.alpha[bit] ← Ports.ToLevel[cmdbits[bit-4]];
ENDLOOP;
dynaport.alpha[9] ← L; -- For the Mode/Fault
dynaport.alpha[10] ← L; -- For Rply/Shared
FOR bit: INT IN [11..21) DO
dynaport.alpha[bit] ← Ports.ToLevel[deviceIdbits[bit-11]];
ENDLOOP;
FOR bit: INT IN [21..36) DO
dynaport.alpha[bit] ← L;
ENDLOOP;
FOR bit: INT IN [36..68) DO
dynaport.alpha[bit] ← Ports.ToLevel[adrsbits[bit-36]];
ENDLOOP;
};
ReadMemory: PROC [address: CARD] RETURNS [] ~ {
This proc send a read command at the address "Address"
readBlockRequest:NAT =00000;
Ports.LCToLS[16,dynaport.rqlar]; -- set mode "10000", length 2, low priority
MergeCom[cmd: readBlockRequest, deviceId: 0, adrs: address];
SELECT dynaport.countcycle FROM
0,1 => { dynaport.countcycle ← dynaport.countcycle+1;
dynaport.send ← H;
dynaport.load ← H; };
2,3 => { dynaport.countcycle ← dynaport.countcycle+1;
dynaport.send ← L };
ENDCASE => {dynaport.countcycle ← dynaport.countcycle+1;
dynaport.load ← L;
NextLine };
};
Simulation Procs
SendType1: PUBLIC PROC [] RETURNS [] ~ {
This Proc deals with the ins type "1"
Unknowncycle:ERROR = CODE;
SELECT dynaport.labelcycle FROM
0 => Init; 
1 => StartStop;
2 => ReadMemory[address: 01234567H];
3 => Wait[10];
4 => Jump[2];
ENDCASE => ERROR Unknowncycle;
};
Here is the Starting point
This procedure send some Data to the DynaBus. It begins to test the "ins"
instance number of the device, and then calls the different senders.
InvalidIns:ERROR = CODE;
SELECT dynaport.param.ins FROM
1 => SendType1[];
ENDCASE => ERROR InvalidIns;
};
END.